Datasheet RL78/I1A R01DS0171EJ0320 Rev.3.20 RENESAS MCU Sep 29, 2017 True Low Power Platform, High Resolution PWM and Rich Analog, 2.7 V to 5.5 V operation, 32 to 64 Kbyte Flash, for Inverter Control, Digital Power Control and Lighting Control Applications 1. OUTLINE 1.1 Features 16-bit timers KB0 to KB2, and KC0 for PWM output Ultra-Low Power Technology 2.7 V to 5.5 V operation from a single supply 16-bit timers KB0 to KB2: maximum 6 outputs (3 channels 2) Stop (RAM retained): 0.23 A, (LVD enabled): 0.31 A Smooth start function, dithering function, forced output Halt (RTC + LVD): 0.60 A stop function (unsynchronized with comparator or external Operating: 156.25 A/MHz interrupt) enables over-voltage protection, over-current 16-bit RL78 CPU Core protection and peak current control, and single/interleave Delivers 41 DMIPS at maximum operating frequency of PFC function 32 MHz Instruction execution: 86% of instructions can be Average resolution < 0.98 nsec output, 64 MHz (when <R> executed in 1 to 2 clock cycles using PLL) + dithering option CISC architecture (Harvard) with 3-stage pipeline <R> 16-bit timer KC0 (1 channel 6 (output)) Multiply signed & unsigned: 16 x 16 to 32-bit result in 1 clock cycle PWM output gating function by interlocking with 16-bit MAC: 16 x 16 to 32-bit result in 2 clock cycles timers KB0, KB1, and KB2 16-bit barrel shifter for shift & rotate in 1 clock cycle 1-wire on-chip debug function Extended-Function Timers Multi-function 16-bit timers: Up to 8 channels Main Flash Memory Real-time clock (RTC): 1 channel (full calendar and Density: 32 KB to 64 KB alarm function with watch correction function) Block size: 1 KB Interval timer: 12-bit, 1 channel On-chip single voltage flash memory with protection from 15 kHz watchdog timer: 1 channel (window function) block erase/writing Self-programming with secure boot swap function and Multiple Communication Interfaces 2 flash shield window function Up to 1 channel x I C multi-master (SMBus/PMBus support) Data Flash Memory Up to 1 channel x CSI/SPI (7-, 8-bit) Data flash with background operation Up to 3 channels x UART (7-, 8-, 9-bit), Data flash size: 4 KB DALI support 1 channel (8-, 16-, 17-, 24-bit, master and Erase cycles: 1 million (typ.) slave) Erase/programming voltage: 2.7 V to 5.5 V Up to 1 channel x LIN RAM Rich Analog 2 KB to 4 KB size options ADC: Up to 11 channels, 8/10-bit resolution, 2.125 s Supports operands or instructions conversion time Back-up retention in all modes Supports 2.7 V Internal voltage reference (1.45 V) High-speed On-chip Oscillator Comparator: High response time 70 ns (typ.), up to 6 32 MHz with +/ 1% accuracy over voltage (2.7 V to 5.5 channels, internal DAC 3 channels 8-bit resolution, V) and temperature (20C to 85C) window comparator mode Pre-configured settings: 32 MHz, 24 MHz, 16 MHz, 12 PGA (x4 to x32): 6 input channels MHz, 8 MHz, 6 MHz, 4 MHz, 3 MHz, 2 MHz & 1 MHz On-chip temperature sensor Reset and Supply Management Safety Features (IEC or UL 60730 compliance) Power-on reset (POR) monitor/generator Flash memory CRC calculation Low voltage detection (LVD) with 6 setting options RAM parity error check (Interrupt and/or reset function) RAM/SFR write protection Data Memory Access (DMA) Controller Illegal memory access detection Up to 2 fully programmable channels Clock stop/frequency detection Transfer unit: 8- or 16-bit ADC self-test General Purpose I/O 5-V tolerant, high-current (up to 8.5 mA per pin) Open-drain, internal pull-up support Operating Ambient Temperature Standard: 40C to +105C Extend: 40C to +125C Package Type and Pin Count SSOP: 20, 30, 38 R01DS0171EJ0320 Rev.3.20 Page 1 of 105 Sep 29, 2017 RL78/I1A 1. OUTLINE ROM, RAM capacities Flash ROM Data flash RAM RL78/I1A 20 pins 30 pins 38 pins Note 64 KB 4 KB 4 KB R5F107AE R5F107DE 32 KB 4 KB 2 KB R5F1076C R5F107AC Note This is about 3 KB when the self-programming function and data flash function are used. R01DS0171EJ0320 Rev.3.20 Page 2 of 105 Sep 29, 2017