X9241AUSIZ Renesas

DATASHEET X9241A FN8164 Rev 7.00 Quad Digital Controlled Potentionmeters (XDCP) Non-Volatile/Low August 17, 2015 Power/2-Wire/64 Taps The X9241A integrates four digitally controlled Features potentiometers (XDCP) on a monolithic CMOS integrated Four potentiometers in one package microcircuit. 2-wire serial interface The digitally controlled potentiometer is implemented using 63 resistive elements in a series array. Between each Register oriented format element are tap points connected to the wiper terminal - Direct read/write/transfer of wiper positions through switches. The position of the wiper on the array is - Store as many as four positions per potentiometer controlled by the user through the 2-wire bus interface. Each Terminal Voltages: +5V, -3.0V potentiometer has associated with it a volatile Wiper Counter Register (WCR) and 4 nonvolatile Data Registers Cascade resistor arrays (DR0:DR3) that can be directly written to and read by the Low power CMOS user. The contents of the WCR controls the position of the High Reliability wiper on the resistor array through the switches. Power up - Endurance100,000 data changes per bit per register recalls the contents of DR0 to the WCR. - Register data retention100 years The XDCP can be used as a three-terminal potentiometer or 16-bytes of nonvolatile memory as a two-terminal variable resistor in a wide variety of applications including control, parameter adjustments, and 3 resistor array values signal processing. -2k10k50kor combination - Cascadable for values of 4k to 200k Resolution: 64 taps each pot 20 Ld plastic DIP, 20 Ld TSSOP and 20 Ld SOIC packages Pb-free available (RoHS compliant) Block Diagram V CC V SS V / H2 R0 R1 V /R R0 R1 H0 H0 R WIPER H2 WIPER REGISTER COUNTER COUNTER ARRAY REGISTER REGISTER POT 2 (WCR) (WCR) V /R V /R R2 L0 L0 R2 L2 L2 R3 R3 V /R V /R W2 W2 W0 W0 SCL SDA INTERFACE AND A0 CONTROL A1 8 CIRCUITRY A2 A3 DATA V /R H1 H1 V /R H3 H3 R0 R0 R1 R1 WIPER WIPER REGISTER REGISTER COUNTER COUNTER ARRAY ARRAY REGISTER REGISTER POT 1 POT 3 V /R (WCR) (WCR) L1 L1 V /R L3 L3 R2 R2 R3 R3 V /R W1 W1 V /R W3 W3 FN8164 Rev 7.00 Page 1 of 17 August 17, 2015X9241A Ordering Information POTENTIOMETER V LIMITS ORGANIZATION TEMP RANGE PACKAGE CC PART NUMBER PART MARKING (V) (k) (C) (RoHS Compliant) X9241AMPZ (Note) X9241AMPZ 5 10% 2/10/50 0 to +70 20 Ld PDIP*** (No longer available, Pot 0 = 2k recommended replacement: Pot 1 = 10k X9241AMSZT1) Pot 2 = 10k X9241AMPIZ (Note) X9241AMPIZ -40 to +85 20 Ld PDIP*** (No longer available, Pot 3 = 50k recommended replacement: X9241AMSZT1) X9241AMSZ* (Note) X9241AMS Z 0 to +70 20 Ld SOIC X9241AMSIZ* (Note) X9241AMSI Z -40 to +85 20 Ld SOIC X9241AMVZ (Note) X9241AM VZ 0 to +70 20 Ld TSSOP X9241AMVIZ* (Note) X9241AM VIZ -40 to +85 20 Ld TSSOP X9241AWPIZ (Note) X9241AWPIZ 10 0 to +70 20 Ld PDIP X9241AWSZ* (Note) X9241AWS Z 0 to +70 20 Ld SOIC Pot 0 = 10k X9241AWSIZ* (Note) X9241AWSI Z -40 to +85 20 Ld SOIC Pot 1 = 10k X9241AWVZ* (Note) X9241AW VZ 0 to +70 20 Ld TSSOP Pot 2 = 10k X9241AWVIZ* (Note) X9241AW VIZ -40 to +85 20 Ld TSSOP Pot 3 = 10k X9241AYPZ (Note) X9241AYPZ 2 0 to +70 20 Ld PDIP*** (No longer available, Pot 0 = 2k recommended replacement: X9241AYSIZ) Pot 1 = 2k X9241AYSZ* (Note) X9241AYS Z 0 to +70 20 Ld SOIC Pot 2 = 2k X9241AYSIZ* (Note) X9241AYSI Z -40 to +85 20 Ld SOIC Pot 3 = 2k X9241AYVZ (Note) X9241AY VZ 0 to +70 20 Ld TSSOP (No longer available, recommended replacement: X9241AYVIZ) X9241AYVIZ* (Note) X9241AY VIZ -40 to +85 20 Ld TSSOP X9241AUPZ (Note) X9241AUPZ 5 10% 50 0 to +70 20 Ld PDIP*** X9241AUPIZ (Note) X9241AUPIZ -40 to +85 20 Ld PDIP*** Pot 0 = 50k X9241AUSZ* (Note) X9241AUS Z 0 to +70 20 Ld SOIC Pot 1 = 50k X9241AUSIZ* (Note) X9241AUSI Z -40 to +85 20 Ld SOIC Pot 2 = 50k X9241AUVZ* (Note) X9241AU VZ 0 to +70 20 Ld TSSOP Pot 3 = 50k (No longer available, recommended replacement: X9241AUSZT1) X9241AUVIZ* (Note) X9241AU VIZ -40 to +85 20 Ld TSSOP *AddT1 suffix for tape and reel. ***Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. FN8164 Rev 7.00 Page 2 of 17 August 17, 2015