The Right Choice for HMI Designs
RZ/A1 Embedded ARM Microprocessors
Expanded product family now with Linux support
Renesas Electronics America
www.renesas.com
RZ/A1 Embedded ARM Microprocessors
Innovative Architecture & Advanced Integration
Renesas RZ/A1 series microprocessors (MPUs) offer an innovative architecture based on
the ARM Cortex -A9 processor and up to an industry-leading 10 MB of on-chip memory.
RZ/A1 MPUs can execute code at 1000 DMIPS from the abundant on-chip memory or
in-place from inexpensive QSPI memory, while using on-chip memory for graphics buffering up to WXGA
(1280x800) resolution. The 128-bit wide internal memory bus with x4 parallel access enables higher-
throughput memory access as compared to systems with external DDR memory. The RZ/A1 series offers
enormous advantages in terms of BOM cost, performance, power consumption, and system design time,
making it the right choice for Human Machine Interface (HMI) and other system-on-chip applications.
ARM Cortex -A9 processor that Up to two Camera inputs Implement up to two inde-
can execute code at 1000 DMIPS available for video and graphics pendent LCD displays with
blending usages WXGA (1280x800) resolution
Remove need for external RAM
for impressive graphical user
with up to 10 MBs of on-chip RAM Scalable line-up with three sizes
interfaces
of on-chip RAM to choose from:
Execute-In-Place (XIP) from QSPI
3 MB (RZ/A1L or RZ/A1LU), 5 MB
memory enabled with three layers
(RZ/A1M), and 10 MB (RZ/A1H)
of cache
Renesas RZ/A1 solution streamlines board design and reduces BOM cost
Conventional Solution Renesas RZ/A1 HMI Solution
Complicated power-management and PCB layout Easy system design and testing
Memory bandwidth split between code and graphics
5V/125V/12V V 5V/125V/12V V
EXTRA EXTRA
PMICPMIC (5-7 (5 channels)-7 channels) RegulatRegulator or RegulatRegulator or
LAYERSLAYERS HIGHERHIGHER
COSTSCOSTS
0.9,0.9, 1.2, 11.2,.8, 13..8,3 V3.3V
3.3V3.3V 1.2V1.2V NO NO
BOTTLE- BOTTLE-
NECKSNECKS
Renesas Renesas
DDRDDR2 2
SPI SPI
ConConventional ventional RZ/RAZ1 /AMPU1 MPU
NORNOR
or or
FlashFlash
FlashFlash
MPUMPU
with with
DDRDDR3 3
On-cOn-chip hip RAMRAM
EXPECTEXPECT
DELADELAYS YS
BOM Component Conventional Solution BOM Component RZ/A1 Solution
Flash $$$ (NOR Flash) Flash $ (SPI Flash)
RAM $$$ (DDR2) RAM n/a (internal)
EXTRA EXTRA
EXPECT EXPECT
PCB PCB
DELAYDESLAYS
Regulators $$$ (5-7 PMIC channels) RegulatorsLAYERSLAYERS $ (3.3V, 1.2V regulator)
PCB layers $$$ (DDR2 supplies, routing) PCB layers $ (as few as two)
Total BOM cost Total BOM cost $
$$$
2 RZ Microprocessors