YR0K5011EFS000BE Renesas

Datasheet R01DS0241EJ0130 RL78/G1G Rev. 1.30 RENESAS MCU Sep 30, 2016 1. OUTLINE 1.1 Features Ultra-low power consumption technology Timer VDD = single power supply voltage of 2.7 to 5.5 V 16-bit timer: 7 channels HALT mode (Timer Array Unit (TAU): 4 channels, Timer RJ: 1 STOP mode channel, Timer RD: 2 channels) SNOOZE mode 12-bit interval timer: 1 channel Watchdog timer: 1 channel (operable with the dedicated low-speed on-chip oscillator) RL78 CPU core CISC architecture with 3-stage pipeline Minimum instruction execution time: Can be changed A/D converter from high-speed (0.04167 s: 24 MHz operation with 8/10-bit resolution A/D converter (VDD = 2.7 to 5.5 V) high-speed on-chip oscillator) to low-speed (1.0 s: 1 Analog input: 8 to 12 channels MHz operation with high-speed on-chip oscillator) Internal reference voltage (1.45 V) and temperature <R> Note Multiply/divide/multiply & accumulate instructions are sensor supported. Address space: 1 MB Note: Selectable only in HS (high-speed main) mode. <R> General-purpose registers: (8-bit register 8) 4 banks On-chip RAM: 1.5 KB Comparator 2 channels Code flash memory The voltage from a dedicated 8-bit DAC (resolution of Code flash memory: 8 to 16 KB 256 with VDD/AVREFP or VSS/AVREFM as the internally Block size: 1 KB generated reference voltage) can be selected as the Prohibition of block erase and rewriting (security reference voltage. function) On-chip debug function Programmable gain amplifier Self-programming (flash shield window function) I/O port High-speed on-chip oscillator I/O port: 26 to 40 Select from 48 MHz, 24 MHz, 16 MHz, 12 MHz, 8 MHz, Can be set to N-ch open drain, TTL input buffer, and on- 4 MHz, and 1 MHz chip pull-up resistor High accuracy: 2.0% Different potential interface: Can connect to a 2.5/3 V device Operating ambient temperature On-chip key interrupt function TA = -40 to +85 C On-chip clock output/buzzer output controller Power management and reset function Others On-chip power-on-reset (POR) circuit On-chip BCD (binary-coded decimal) correction circuit On-chip voltage detector (LVD) (Select interrupt and reset from 6 levels) Remark: The function mounted depend on the product. See 1.6 Outline of Functions. Event link controller (ELC) Event signals of 18 to 19 types can be linked to the specified peripheral function. Serial interfaces CSI: 1 channel UART: 2 channels 2 Simplified I C: 1 channel R01DS0241EJ0130 Rev. 1.30 Page 1 of 67 Sep 30, 2016RL78/G1G 1. OUTLINE ROM, RAM capacities Flash ROM RAM 30 pins 32 pins 44 pins Note 16 KB R5F11EAAASP R5F11EBAAFP R5F11EFAAFP 1.5 KB 8 KB R5F11EA8ASP R5F11EB8AFP R5F11EF8AFP Note This is 630 bytes when the self-programming function is used. R01DS0241EJ0130 Rev. 1.30 Page 2 of 67 Sep 30, 2016