DATASHEET ZL9101M FN7669 Rev.8.00 Digital DC/DC PMBus 12A Module Jun 20, 2017 The ZL9101M is a 12A, variable output, step-down Features PMBus-compliant digital power supply. Included in the module Complete digital switch mode power supply is a high-performance digital PWM controller, power MOSFETs, an inductor, and all the passive components required for a Fast transient response highly integrated DC/DC power solution. This power module Auto compensating PID filter has built-in auto-compensation algorithms, which eliminate External synchronization the need for manual compensation design work. The ZL9101M operates over a wide input voltage range and supports an Output voltage tracking output voltage range of 0.6V to 3.6V, which can be set by Current sharing external resistors or through PMBus. This high-efficiency power module is capable of delivering 12A. Only bulk input and Programmable soft-start delay and ramp output capacitors are needed to finish the design. The output Overcurrent/undercurrent protection voltage can be precisely regulated to as low as 0.6V with 1% PMBus compliant output voltage regulation over line, load, and temperature variations. Applications The ZL9101M features auto compensation, internal soft-start, Server, telecom, and datacom auto-recovery overcurrent protection, an enable option, and Industrial and medical equipment prebiased output start-up capabilities. General purpose point-of-load The ZL9101M is packaged in a thermally enhanced, compact (15mmx15mm) and low profile (3.5mm) overmolded QFN Related Literature package module suitable for automated assembly by standard surface mount equipment. The ZL9101M is RoHS compliant. For a full list of related documents, visit our website - ZL9101M product page Figure 1 represents a typical implementation of the ZL9101M. For PMBus operation, it is recommended to tie the Enable pin (EN) to SGND. V IN V DRV 10F 4.5V TO 13.2V 10F 4.7F 4.7F 4.5V TO 6.5V 16V 16V 16V 16V C IN POWER GOOD OUTPUT PG VIN (EPAD) V ENABLE EN OUT VOUT (EPAD) EXT SYNC SYNC ZL9101M DDC BUS SW DDC C OUT (EPAD) SCL RTN SDA PGND 2 I C/SMBus (EPAD) SA R SA R SET FIGURE 1. A COMPLETE DIGITAL SWITCH MODE POWER SUPPLY, ONLY BULK INPUT AND OUTPUT CAPACITORS ARE REQUIRED TO FINISH THE DESIGN FN7669 Rev.8.00 Page 1 of 63 Jun 20, 2017 VDRV VSET VR VTRK SGND V25 FB+ FB- VDDZL9101M Table of Contents Pin Configuration 3 Pin Descriptions . 3 Internal Block Diagram . 4 Typical Application - Single Module 5 Thermal Information . 7 Recommended Operating Conditions 7 Electrical Specifications . 7 Derating Curves 10 2 C/SMBus Communications 11 I Output Voltage Selection . 11 Soft-Start Delay and Ramp Times 11 Power-Good 11 Switching Frequency and PLL . 12 Loop Compensation . 12 Adaptive Diode Emulation 12 Input Undervoltage Lockout . 12 Output Overvoltage Protection . 12 Output Prebias Protection 13 Output Overcurrent Protection . 13 Thermal Overload Protection 13 2 I C/SMBus Module Address Selection 14 Phase Spreading 14 Output Voltage Tracking 14 Output Sequencing 15 Fault Spreading . 15 Active Current Sharing . 15 Phase Adding/Dropping 16 2 Monitoring Through I C/SMBus 16 Nonvolatile Memory and Device Security Features 17 Output Capacitor Selection 17 Input Capacitor Selection . 18 Layout Guide . 18 Thermal Consideration . 18 Package Description . 18 Thermal Vias 19 Stencil Pattern Design . 19 PMBus Command Summary 20 PMBus Use Guidelines 24 PMBus Commands Description . 25 Firmware Revision History . 59 Revision History 60 About Intersil 61 Package Outline Drawing 62 FN7669 Rev.8.00 Page 2 of 63 Jun 20, 2017