MM54C922/MM74C922 16-Key Encoder, MM54C923/MM74C923 20-Key Encoder July 1993 MM54C922/MM74C922 16-Key Encoder MM54C923/MM74C923 20-Key Encoder General Description These CMOS key encoders provide all the necessary logic An internal register remembers the last key pressed even to fully encode an array of SPST switches. The keyboard after the key is released. The TRI-STATE outputs provide scan can be implemented by either an external clock or for easy expansion and bus operation and are LPTTL com- external capacitor. These encoders also have on-chip pull- patible. up devices which permit switches with up to 50 kX on resist- ance to be used. No diodes in the switch array are needed Features to eliminate ghost switches. The internal debounce circuit Y 50 kX maximum switch on resistance needs only a single external capacitor and can be defeated Y On or off chip clock by omitting the capacitor. A Data Available output goes to a Y On-chip row pull-up devices high level when a valid keyboard entry has been made. The Y 2 key roll-over Data Available output returns to a low level when the en- Y Keybounce elimination with single capacitor tered key is released, even if another key is depressed. The Y Last key register at outputs Data Available will return high to indicate acceptance of the Y new key after a normal debounce period this two-key roll- TRI-STATE outpust LPTTL compatible over is provided between any two switches. Y Wide supply range 3V to 15V Y Low power consumption Connection Diagrams Pin Assignment for Pin Assignment Pin Assignment for Dual-In-Line Package for SOIC DIP and SOIC Package TL/F/603714 Top View TL/F/60371 Order Number MM74C922 Top View TL/F/60372 Top View Order Number MM54C922 or MM74C922 Order Number MM54C923 or MM74C923 TRI-STATE is a registered trademark of National Semiconductor Corporation. C 1995 National Semiconductor Corporation TL/F/6037 RRD-B30M105/Printed in U. S. A.Absolute Maximum Ratings (Note 1) b a If Military/Aerospace specified devices are required, Storage Temperature Range 65 Cto 150 C please contact the National Semiconductor Sales Power Dissipation (P ) D Office/Distributors for availability and specifications. Dual-In-Line 700 mW Voltage at Any Pin V b 0.3V to V a 0.3V Small Outline 500 mW CC CC Operating Temperature Range Operating V Range 3V to 15V CC MM54C922, MM54C923 b55 Ctoa125 C V 18V CC b a MM74C922, MM74C923 40 Cto 85 C Lead Temperature (Soldering, 10 seconds) 260 C DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise specified Symbol Parameter Conditions Min Typ Max Units CMOS TO CMOS e t V Positive-Going Threshold Voltage V 5V, I 0.7 mA 3.0 3.6 4.3 V a T CC IN t e at Osc and KBM Inputs V 10V, I 1.4 mA 6.0 6.8 8.6 V CC IN e t V 15V, I 2.1 mA 9.0 10 12.9 V CC IN t e V b Negative-Going Threshold Voltage V 5V, I 0.7 mA 0.7 1.4 2.0 V T CC IN e t at Osc and KBM Inputs V 10V, I 1.4 mA 1.4 3.2 4.0 V CC IN t V e 15V, I 2.1 mA 2.1 5 6.0 V CC IN e V Logical 1 Input Voltage, V 5V 3.5 4.5 V IN(1) CC Except Osc and KBM Inputs V e 10V 8.0 9 V CC e V 15V 12.5 13.5 V CC e V Logical 0 Input Voltage, V 5V 0.5 1.5 V IN(0) CC e Except Osc and KBM Inputs V 10V 1 2 V CC e V 15V 1.5 2.5 V CC e e b b I Row Pull-Up Current at Y1, Y2, V 5V, V 0.1 V 2 5 mA rp CC IN CC e b b Y3, Y4 and Y5 Inputs V 10V 10 20 mA CC e b b V 15V 22 45 mA CC e eb V Logical 1 Output Voltage V 5V, I 10 mA 4.5 V OUT(1) CC O e eb V 10V, I 10 mA9 V CC O e eb V 15V, I 10 mA 13.5 V CC O e e V Logical 0 Output Voltage V 5V, I 10 mA 0.5 V OUT(0) CC O e e V 10V, I 10 mA1V CC O V e 15V, I e 10 mA 1.5 V CC O e e R Column ON Resistance at V 5V, V 0.5V 500 1400 X on CC O e e X1, X2, X3 and X4 Outputs V 10V, V 1V 300 700 X CC O e e V 15V, V 1.5V 200 500 X CC O e I Supply Current V 5V 0.55 1.1 mA CC CC e Osc at 0V, (one Y low) V 10V 1.1 1.9 mA CC e V 15V 1.7 2.6 mA CC e e I Logical 1 Input Current V 15V, V 15V IN(1) CC IN 0.005 1.0 mA at Output Enable e e I Logical 0 Input Current V 15V, V 0V IN(0) CC IN b b 1.0 0.005 mA at Output Enable CMOS/LPTTL INTERFACE e b V Logical 1 Input Voltage, 54C, V 4.5V V 1.5 V IN(1) CC CC Except Osc and KBM Inputs 74C, V e 4.75V V b 1.5 V CC CC e V Logical 0 Input Voltage, 54C, V 4.5V 0.8 V IN(0) CC Except Osc and KBM Inputs 74C, V e 4.75V 0.8 V CC e V Logical 1 Output Voltage 54C, V 4.5V OUT(1) CC 2.4 V eb I 360 mA O e 74C, V 4.75V CC 2.4 V eb I 360 mA O e V Logical 0 Output Voltage 54C, V 4.5V OUT(0) CC 0.4 V eb I 360 mA O e 74C, V 4.75V CC 0.4 V eb I 360 mA O Note 1: Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. Except for Operating Temperature Range they are not meant to imply that the devices should be operated at these limits. The table of Electrical Characteristics provides conditions for actual device operation. 2