Datasheet Analog Audio Processors Sound Processors with Built-in Surround Sound Function BD3490FV General Description Key Specifications Built in stereo 4 input selectors and volume that there is Current upon no signal: 7mA(Typ.) not an impedance change of a volume terminal. And this Total harmonic distortion: 0.002%(Typ.) is sound processor can realize 2-band equalizer Maximum input voltage: 2.4Vrms(Typ.) Cross-talk between selectors: 100dB(Typ.) (bass/treble, gain14dB / 2dB step) and bass-boost, Volume Control range: 0dB to -87dB output-gain, surround by external components. Output noise voltage: 5Vrms(Typ.) Features Residual output noise voltage: 5Vrms(Typ.) Built in stereo 4 input selectors (single end). Operating Range of Temperature: -40 to +85 Built-in input gain controller for volume of a portable audio input. package(s) W(Typ.) x D(Typ.) x H(Max.) When the volume setting exchanging, it can use a SSOP-B28 10.00mm x 7.60mm x 1.35mm volume input terminal as a microphone input terminal because there is not an impedance change of a volume input terminal. Bi-CMOS process is suitable for the design of low current and low energy. And it provides more quality for Bi-CMOS small scale regulator and heat in a set. The package of this IC is SSOP-B28. It gathers a sound input terminals, sound output terminals respectively and it arranges them, to be arranging facilitates the laying-out of PCB pattern and reduces PCB area to one-way in the flow of the signal. Applications It is the optimal for the mini compo or micro compo. Besides, it is possible to use for the audio equipment SSOP-B28 of TV, DVD etc with all kinds FIL GND VCC OUT1 OUT2 SDA SCL Typical Application Circuit 4.7k 4.7k 22k 0.0047 4.7 4.7 10 0.1 10 0.1 0.1 0.1 0.1 24 23 19 18 17 16 15 28 27 26 25 22 21 20 FIL GND SDA SCL VCC OUT1 SB1 SR SB2 OUT2 BCB1 BCA1 BCA2 BCB2 2 VCC/2 I C BUS LOGIC VCC Bass Gain=14dB/2dB step Surround TrebleBass Treble Gain=14dB/2dB step Volume 0dB~ -87dB/1dB step, -dB, Independent control Input Gain 0~+8dB/2dB step 12, 16, 20dB Surround Gain=OFF, Low, Middle, High Volume Volume Input Gain Input Selector 50k 50k 50k 50k 50k 50k 50k 50k A1 A2 B1 B2 C1 C2 D1 D2 SEL2 SEL1 VOL1 VOL2 TC2 TC1 1 2 45 6 7 8 9 10 11 12 13 14 3 0.0047 0.0047 2.2 1 1 1 1 1 1 1 1 2.2 A1 A2 B1 B2 C1 C2 D1 D2 Figure 1. Application Circuit Diagram Product structureSilicon monolithic integrated circuit This product is not designed protection against radioactive rays www .rohm.com TSZ02201-0V2V0E100030-1-2 2012 ROHM Co., Ltd. All rights reserved. 1/30 TSZ2211114001 2012.10.05 Rev.001DatasheetDatasheet BD3490FV Pin Configuration SSOP-B28 (TOP VIEW) A1 1 28 FIL A2 2 27 GND B1 3 26 SDA B2 4 25 SCL C1 5 24 VCC 23 OUT1 C2 6 D1 7 22 SB1 21 SR D2 8 SEL2 9 20 SB2 SEL1 10 19 OUT2 VOL1 11 18 BCB1 17 BCA1 VOL2 12 TC2 13 16 BCA2 TC1 14 15 BCB2 Figure 2. Pin configuration Pin Descriptions Terminal Terminal Terminal Terminal Description Description Name Name No. No. 1 A1 A input terminal of 1ch 15 BCB2 Bass filter terminal of 2ch 2 A2 A input terminal of 2ch 16 BCA2 Bass filter terminal of 2ch 3 B1 B input terminal of 1ch 17 BCA1 Bass filter terminal of 1ch 4 B2 B input terminal of 2ch 18 BCB1 Bass filter terminal of 1ch 5 C1 C input terminal of 1ch 19 OUT2 Output terminal of 2ch 6 C2 C input terminal of 2ch 20 SB2 Bass boost terminal of 2ch 7 D1 D input terminal of 1ch 21 SR Surround terminal 8 D2 D input terminal of 2ch 22 SB1 Bass boost terminal of 1ch 9 SEL2 SEL output terminal of 2ch 23 OUT1 Output terminal of 1ch 10 SEL1 SEL output terminal of 1ch 24 VCC Power supply terminal 2 11 VOL1 Volume input terminal of 1ch 25 SCL I C Communication clock terminal 2 12 VOL2 Volume input terminal of 2ch 26 SDA I C Communication data terminal 13 TC2 Treble filter terminal of 2ch 27 GND GND terminal 14 TC1 Treble filter terminal of 1ch 28 FIL VCC/2 terminal www.rohm.com TSZ02201-0V2V0E100030-1-2 2012 ROHM Co., Ltd. All rights reserved. 2/30 TSZ2211115001 2012.10.05 Rev.001