Datasheet Power Management Integrated Circuit BD71837AMWV General Description Key Specifications BD71837AMWV is a programmable Power Input Voltage Range (VSYS): 2.7 V to 5.5 V Management IC (PMIC) for powering single-core, SNVS State Current: 30 A(Typ) dual-core, and quad-core SoCs such as NXP-i.MX 8M. SUSPEND State Current: 137 A(Typ) It is optimized for low BOM cost and compact solution IDLE State Current: 167 A(Typ) footprint. It integrates 8 Buck regulators and 7 LDOs to RUN State Current: 197 A(Typ) provide all the power rails required by the SoC and the Operating Temperature Range: -40 C to +105 C commonly used peripherals. QFN package and pinout support low cost Type 3 Applications (non-HDI) PCB. Programmable power sequencing Streaming Media Boxes and Dongles and output voltages, flexible power state control for AV Receivers and Wireless Sound Bars easier system design and supports a wide variety of Industrial HMI, SBC, IPC and Panel Computer processors and system implementations. Package W(Typ) x D(Typ) x H(Max) Features UQFN68CV8080 8.00mm x 8.00mm x 1.00mm 8 Buck Regulators 2.0 MHz Switching Frequency. (BUCK1, BUCK2, BUCK3, BUCK4, BUCK5, BUCK7, and BUCK8). 1.5MHz Switching Frequency. (BUCK6) Target Efficiency: 83% to 95%. Output Current & Voltage. BUCK1: 3.6 A, 0.7 V to 1.3 V/10 mV step, DVS BUCK2: 4.0 A, 0.7 V to 1.3 V/10 mV step, DVS BUCK3: 2.1 A, 0.7 V to 1.3 V/10 mV step, DVS BUCK4: 1.0 A, 0.7 V to 1.3 V/10 mV step, DVS BUCK5: 2.5 A, 0.70 V to 1.35 V/8steps BUCK6: 3.0 A, 3.0 V to 3.3 V/100 mV step BUCK7: 1.5 A, 1.605 V to 1.995 V/8steps BUCK8: 3.0 A, 0.8 V to 1.4 V/10 mV step 7ch Linear Regulators(7 LDOs) LDO1: 10 mA, 3.0 V to 3.3 V, 1.6 V to 1.9 V LDO2: 10 mA, 0.9 V, 0.8 V LDO3: 300 mA, 1.8 V to 3.3 V LDO4: 250 mA, 0.9 V to 1.8 V LDO5: 300 mA, 1.8 V to 3.3 V LDO6: 300 mA, 0.9 V to 1.8 V LDO7: 150 mA, 1.8 V to 3.3 V Power Mux Switch 1.8V Input: 200 m(Max) 3.3V Input: 280 m(Max) 32.768 kHz Crystal Oscillator Driver Power Button Detector Protection and Monitoring: Soft Start, Power Rails Fault Detection, UVLO, OVP and TSD OTP Configurable Power Sequencing OTP and Software Programmable Output Voltage, Ramp rates. Hardware Signaling with SoC for Transition into or out of Low Power States Interfaces: I2C: 100 kHz/400 kHz, 1 MHz Power-on Reset Output: POR B, RTC RESET B, Watchdog Reset Input: WDOG B: Power State Control: PMIC STBY REQ, PMIC ON REQ, PWRON B Interrupt to SoC: IRQ B Type3 PCB Applicable Product structure : Silicon integrated circuit. This product has no designed protection against radioactive rays www.rohm.com TSZ02201-0Q2Q0A500630-1-2 2019 ROHM Co., Ltd. All rights reserved. 1/126 16.Mar.2020 Rev.003 TSZ2211114001 BD71837AMWV Contents 1. Introduction ............................................................................................................................................................................. 7 1.1. Terminology .................................................................................................................................................................... 7 1.2. System Power Map & Typical Application Circuit ........................................................................................................... 8 1.3. Pin Configuration .......................................................................................................................................................... 10 1.4. Pin Description ............................................................................................................................................................. 11 1.5. I/O Equivalence Circuit ................................................................................................................................................. 12 1.6. Power Rail .................................................................................................................................................................... 14 1.7. Register Map ................................................................................................................................................................ 15 1.8. ESD .............................................................................................................................................................................. 17 2. Operating Conditions ............................................................................................................................................................ 18 2.1. Absolute Maximum Ratings (Ta=25 C)........................................................................................................................ 18 2.2. Thermal Resistance ..................................................................................................................................................... 18 2.3. Recommended Operating Conditions .......................................................................................................................... 19 2.4. Current Consumption ................................................................................................................................................... 19 2.5. Power Reference and Detectors (UVLO) ..................................................................................................................... 20 3. Power State Control ............................................................................................................................................................. 21 3.1. Power Control Signals .................................................................................................................................................. 21 3.1.1. PWRON B ........................................................................................................................................................... 22 3.1.2. PMIC ON REQ ................................................................................................................................................... 22 3.1.3. PMIC STBY REQ ............................................................................................................................................... 22 3.1.4. WDOG B ............................................................................................................................................................. 22 3.1.5. RTC RESET B ................................................................................................................................................... 23 3.1.6. POR B................................................................................................................................................................. 23 3.2. Power States ................................................................................................................................................................ 24 3.2.1. Power State Diagram ........................................................................................................................................... 24 3.2.2. Power State Register ........................................................................................................................................... 25 3.2.3. Power State Definition ......................................................................................................................................... 27 3.2.4. Power State Control Events ................................................................................................................................. 28 3.2.4.1. Reset Event ................................................................................................................................................. 28 3.2.4.2. Emergency Shutdown Event ....................................................................................................................... 30 3.2.5. Power State Transitions ....................................................................................................................................... 30 3.2.5.1. OFF to READY ............................................................................................................................................ 30 3.2.5.2. READY to SNVS ......................................................................................................................................... 31 3.2.5.3. SNVS to RUN .............................................................................................................................................. 34 3.2.5.4. RUN to IDLE ................................................................................................................................................ 36 3.2.5.5. IDLE to RUN ................................................................................................................................................ 36 3.2.5.6. RUN to SUSPEND ...................................................................................................................................... 36 3.2.5.7. SUSPEND to RUN ...................................................................................................................................... 36 3.2.5.8. IDLE to SUSPEND ...................................................................................................................................... 37 3.2.5.9. Emergency Shutdown ................................................................................................................................. 37 3.2.5.10. VR Fault ...................................................................................................................................................... 38 3.2.5.11. EMG to OFF ................................................................................................................................................ 42 3.2.5.12. EMG to READY ........................................................................................................................................... 43 3.2.5.13. EMG STAY Condition ................................................................................................................................. 44 3.2.5.14. Warm Reset ................................................................................................................................................. 44 3.2.5.15. PWROFF ..................................................................................................................................................... 45 3.2.5.16. PWROFF to READY.................................................................................................................................... 47 3.2.5.17. PWROFF to SNVS ...................................................................................................................................... 47 3.2.5.18. PWRON B Functionality ............................................................................................................................. 47 3.3. Power Sequence .......................................................................................................................................................... 49 3.3.1. Power ON Sequence ........................................................................................................................................... 49 3.3.2. Power OFF Sequence ......................................................................................................................................... 51 3.3.3. RUN to IDLE ........................................................................................................................................................ 55 3.3.4. IDLE to RUN ........................................................................................................................................................ 56 3.3.5. RUN to SUSPEND ............................................................................................................................................... 57 3.3.6. SUSPEND to RUN ............................................................................................................................................... 58 3.3.7. IDLE to SUSPEND .............................................................................................................................................. 59 3.3.8. Emergency Shutdown .......................................................................................................................................... 60 3.3.9. Warm Reset ......................................................................................................................................................... 61 3.3.10. Reset Source Indicators....................................................................................................................................... 62 4. I2C and Interrupt .................................................................................................................................................................. 63 4.1. I2C Bus Interface ......................................................................................................................................................... 63 4.1.1. I2C Bus Interface Overview ................................................................................................................................. 63 4.1.2. I2C Bus Interface Electrical Characteristics ......................................................................................................... 64 4.1.3. Device Addressing ............................................................................................................................................... 66 4.1.4. Write / Read Operation ........................................................................................................................................ 67 4.2. Interrupt ........................................................................................................................................................................ 68 4.2.1. Interrupt Overview ............................................................................................................................................... 68 5. Power Rails .......................................................................................................................................................................... 71 www.rohm.com TSZ02201-0Q2Q0A500630-1-2 2019 ROHM Co., Ltd. All rights reserved. 2/126 16.Mar.2020 Rev.003 TSZ22111 15 001