Dear customer st LAPIS Semiconductor Co., Ltd. LAPIS Semiconducto), on the 1 day of October, 2020, implemented the incorporation-type company split (shinsetsu-bunkatsu) in which LAPIS established a new company, LAPIS Technology Co., Ltd. (LAPIS Technology) and LAPIS Technology succeeded LAPIS Semiconductors LSI business. Therefore, all references toLAPIS Semiconductor Co., Ltd,LAPIS Semiconducto and/orLAPI in this document shall be replaced withLAPIS Technology Co., Ltd Furthermore, there are no changes to the documents relating to our products other than the company name, the company trademark, logo, etc. Thank you for your understanding. LAPIS Technology Co., Ltd. October 1, 2020 FEDL610Q178FULL-01 Issue Date: May 18, 2012 ML610Q178 The low power micro controller corresponding to 5v for household appliances I GENERAL DESCRIPTION Equipped with a 8-bit CPU nX-U8/100, the ML610Q178 is a high-performance 8-bit CMOS microcontroller that integrates a wide variety of peripherals such as 10-bit A/D converter, timer, PWM, synchronous serial port, UART, I2C bus interface (master), Battery level detect circuit, LCD driver. The nX-U8/100 CPU is capable of executing instructions efficiently on a one-instruction-per-clock-pulse basis through parallel processing by the 3-stage pipelined architecture. In addition, it has an on-chip debugging function, which allows software debugging/rewriting with the LSI mounted on the board. FEATURES CPU 8-bit RISC CPU (CPU name: nX-U8/100) Instruction system:16-bit instructions Instruction set:Transfer, arithmetic operations, comparison, logic operations, multiplication/division, bit manipulations, bit logic operations, jump, conditional jump, call return stack manipulations, arithmetic shift, and so on On-Chip debug function Minimum instruction execution time Approx 30.5 s (at 32.768kHz system clock) Approx 0.122 s (at 8.192MHz system clock)V = 2.2 to 5.5V DD Internal memory Has 128-Kbyte flash ROM(64K 16-bit) built in. (1K byte of test domain that it cannot be used is included) Has 4-Kbyte RAM (4096 8 bits) built in. Interrupt controller 2 non-maskable interrupt sources (Internal source: 1, External source: 1) 23 maskable interrupt sources (Internal source: 19, External source: 4) Time base counter Low-speed time base counter 1 channel High-speed time base counter 1 channel Watchdog timer Generates a non-maskable interrupt upon the first overflow and a system reset occurs upon the second Free running Overflow period: 4 types selectable (125ms, 500ms, 2s, and 8s) Timers 8 bits 6ch (16-bit configuration available) 1/28