Dear customer st LAPIS Semiconductor Co., Ltd. LAPIS Semiconducto), on the 1 day of October, 2020, implemented the incorporation-type company split (shinsetsu-bunkatsu) in which LAPIS established a new company, LAPIS Technology Co., Ltd. (LAPIS Technology) and LAPIS Technology succeeded LAPIS Semiconductors LSI business. Therefore, all references toLAPIS Semiconductor Co., Ltd,LAPIS Semiconducto and/orLAPI in this document shall be replaced withLAPIS Technology Co., Ltd Furthermore, there are no changes to the documents relating to our products other than the company name, the company trademark, logo, etc. Thank you for your understanding. LAPIS Technology Co., Ltd. October 1, 2020 FEDL620Q150A-01 Issue Date: May 7, 2015 ML620Q151A/2A/3A/4A/5A/6A/7A/8A/9A 16-bit micro controller GENERAL DESCRIPTION This LSI is a high-performance 16-bit CMOS microcontroller into which rich peripheral circuits, such as 10-bit A/D converter, timer, PWM, synchronous serial port, UART, I2C bus interface (master), Low level detect circuit, are incorporated around 16-bit CPU nX-U16/100. The CPU nX-U16/100 is capable of efficient instruction execution in 1-instruction 1-clock mode by 3-stage pipe line architecture parallel procesing. and, this LSI has a data flash-memory fill area by a software which can be written in. In addition, it has an on-chip debugging function, which allows software debugging/rewriting with the LSI mounted on the board. FEATURES CPU 16-bit RISC CPU (CPU name: nX-U16/100) Instruction system:16-bit instructions Instruction set:Transfer, arithmetic operations, comparison, logic operations, multiplication/division, bit manipulations, bit logic operations, jump, conditional jump, call return stack manipulations, arithmetic shift, and so on On-Chip debug function Minimum instruction execution time Approx 30.5 s (at 32.768kHz system clock) Approx 0.122 s (at 8.192MHz system clock) Internal memory Flash-memory Product Program area Rewrite cycle ML620Q151A/ML620Q154A/ML620Q157A 32-Kbyte* (16K 16-bit) ML620Q152A/ML620Q155A/ML620Q158A 48-Kbyte* (24K 16-bit) 100 ML620Q153A/ML620Q156A/ML620Q159A 64-Kbyte* (32K 16-bit) * including unusable 1KByte TEST area Internal 2-Kbyte Data Flash (1-Kbyte 2) Rewrite cycle: 10,000 times SRAM: Internal 2-Kbyte RAM (2-Kbyte 8 -bits) Interrupt controller 2 non-maskable interrupt sources (Internal source: BACK-UP CLOCK, WDT) maskable interrupt Product Interrupt source ML620Q151A/ML620Q154A/ML620Q157A 27 (Internal source: 20, External source: 7) ML620Q152A/ML620Q155A/ML620Q158A 28 (Internal source: 20, External source: 8) ML620Q153A/ML620Q156A/ML620Q159A 28 (Internal source: 20, External source: 8) 4 steps of interrupt level, and a mask function 1/36