MR48V256CTAZAARL ROHM

FEDR48V256C-01 Issue Date: Nov. 13, 2013 MR48V256C 32,768-Word 8-Bit FeRAM (Ferroelectric Random Access Memory) GENERAL DESCRIPTION The MR48V256C is a nonvolatile 32,768-word x 8-bit ferroelectric random access memory (FeRAM) developed in the ferroelectric process and silicon-gate CMOS technology. Unlike SRAMs, this device, whose cells are nonvolatile, eliminates battery backup required to hold data. This device has no mechanisms of erasing and programming memory cells and blocks, such as those used for various EEPROMs. Therefore, the write cycle time can be equal to the read cycle time and the power consumption during a write can be reduced significantly. The MR48V256C can be used in various applications, because the device is guaranteed for the write/read 12 tolerance of 10 cycles per bit and the rewrite count can be extended significantly. FEATURES 32,768-word 8-bit configuration A single 2.7 to 3.6V power supply Read access time: 70 ns (Max.) Write enable time: 70 ns (Min.) Random read/write cycle time 150 ns (Min.) 12 Read/write tolerance 10 cycles/bit Data retention 10 years Guaranteed operating temperature range 40 to 85C (Extended temperature version) Package options: 28-pin plastic TSOPI (TSOP(1)28-08134-0.55-ZK6) PRODUCT FAMILY Access Time Family Read/Write Package Cycle Time Relative to CE Relative to OE MR48V256C 70ns 40ns 150ns 28pin TSOPI 1/13 FEDR48V256C-01 MR48V256C PIN CONFIGURATION 28-pin plastic TSOPI P-TSOP(1)28-08134-0.55-ZK6 OE 1 28 A10 2 27 CE A11 3 26 DQ7 A9 A8 4 25 DQ6 A13 5 24 DQ5 WE 6 23 DQ4 7 22 DQ3 VCC MR48V256C 8 21 VSS A14 A12 9 20 DQ2 A7 10 19 DQ1 A6 11 18 DQ0 12 17 A0 A5 13 16 A1 A4 A3 14 15 A2 Note: Signal names that end with indicate that the pins are negative-true logic. 2/13