LH7A400 32-Bit System-on-Chip Data Sheet Three Programmable Timers FEATURES ARM922T Core: Three UARTs 32-bit ARM9TDMI RISC Core (200 MHz) Classic IrDA (115 kbit/s) 16KB Cache: 8KB Instruction Cache and Smart Card Interface (ISO7816) 8KB Data Cache Two DC-to-DC Converters MMU (Windows CE Enabled) MultiMediaCard Interface 80KB On-Chip Memory AC97 Codec Interface Programmable Interrupt Controller Smart Battery Monitor Interface External Bus Interface Real Time Clock (RTC) 100 MHz Asynchronous SRAM/ROM/Flash Up to 60 General Purpose I/Os Synchronous DRAM/Flash Watchdog Timer PCMCIA JTAG Debug Interface and Boundary Scan CompactFlash Operating Voltage Clock and Power Management 1.8 V Core 32.768 kHz and 14.7456 MHz Oscillators 3.3 V Input/Output Programmable PLL 5 V Tolerant Digital Inputs (except oscillator pins) Low Power Modes (Typical) Oscillator pins P15, P16, R13, and T13 are 1.8 V Run (125 mA), Halt (25 mA), Standby (42 A) 10%. Programmable LCD Controller Operating Temperature Up to 1,024 768 Resolution 0C to +70C Commercial Supports STN, Color STN, AD-TFT, HR-TFT, TFT -40C to +85C Industrial (With Clock Frequency Up to 64 k-Colors and 15 Gray Shades Reduction) DMA (10 Channels) 256-Ball PBGA or 256-Ball CABGA Package AC97 MMC DESCRIPTION USB The LH7A400, powered by an ARM922T, is a com- USB Device Interface (USB 1.1) plete System-on-Chip with a high level of integration to Synchronous Serial Port (SSP) satisfy a wide range of requirements and expectations. Motorola SPI This high degree of integration lowers overall sys- Texas Instruments SSI tem costs, reduces development cycle time and accel- National MICROWIRE erates product introduction. Motorola SPI is a trademark of Motorola, Inc. National Semiconductor MICROWIRE is a trademark of National Semiconductor Corporation. Windows CE is a trademark of Microsoft Corporation. Data Sheet Version 1.0 1LH7A400 32-Bit System-on-Chip LH7A400 14.7456 MHz 32.768 kHz REAL TIME OSCILLATOR, CLOCK PLL1 and PLL2, POWER MANAGEMENT, and WATCHDOG RESET CONTROL TIMER TIMER (3) ARM922T INTERRUPT GENERAL CONTROLLER PURPOSE I/O (60) STATIC (ASYNCHRONOUS) SYNCHRONOUS MEMORY ADVANCED SERIAL PORT CONTROLLER PERIPHERAL (SMC) BUS BRIDGE BATTERY PCMCIA/CF EXTERNAL MONITOR CONTROLLER BUS INTERFACE INTERFACE SYNCHRONOUS UART (3) DYNAMIC RAM CONTROLLER IrDA (SDMC) INTERFACE LCD AHB USB DEVICE 80KB BUS INTERFACE SRAM MULTIMEDIACARD COLOR LCD DMA INTERFACE CONTROLLER CONTROLLER ADVANCED AUDIO CODEC (AC97) ADVANCED LCD INTERFACE AUDIO CODEC INTERFACE SMART CARD INTERFACE ADVANCED (ISO7816) ADVANCED HIGH-PERFORMANCE PERPHERAL BUS (AHB) BUS (APB) DC to DC INTERFACE (2) LH7A400-1 Figure 1. LH7A400 Block Diagram 2 Version 1.0 Data Sheet