Ultra Series Crystal Oscillator
Si540 Data Sheet
Ultra Low Jitter Any-Frequency XO (125 fs), 0.2 to 1500 MHz
KEY FEATURES
th
The Si540 Ultra Series oscillator utilizes Silicon Laboratories advanced 4
Available with any frequency from 0.2 MHz to
generation DSPLL technology to provide an ultra-low jitter, low phase noise clock
1500 MHz
at any output frequency. The device is factory-programmed to any frequency from
Very low jitter: 125 fs Typ RMS
0.2 to 1500 MHz with <1 ppb resolution and maintains exceptionally low jitter for
(12 kHz 20 MHz)
both integer and fractional frequencies across its operating range. The Si540
Excellent PSNR and supply noise immunity:
offers excellent reliability and frequency stability as well as guaranteed aging
80 dBc Typ
performance. On-chip power supply filtering provides industry-leading power
7 ppm stability option (-40 to 85C)
supply noise rejection, simplifying the task of generating low jitter clocks in noisy
systems that use switched-mode power supplies. Offered in industry-standard
3.3 V, 2.5 V and 1.8 V V supply operation
DD
footprints, the Si540 has a dramatically simplified supply chain that enables Silicon
from the same part number
Labs to ship custom frequency samples 1-2 weeks after receipt of order. Unlike a
LVPECL, LVDS, CML, HCSL, CMOS, and
traditional XO, where a different crystal is required for each output frequency, the
Dual CMOS output options
Si540 uses one simple crystal and a DSPLL IC-based approach to provide the de-
2.53.2, 3.25, 5x7 mm package footprints
sired output frequency. This process also guarantees 100% electrical testing of ev-
Any custom frequency available with 1-2
ery device. The Si540 is factory-configurable for a wide variety of user specifica-
week lead times
tions, including frequency, output format, and OE pin location/polarity. Specific
configurations are factory-programmed at time of shipment, eliminating the long
lead times associated with custom oscillators. APPLICATIONS
100G/200G/400G OTN, coherent optics
Pin Assignments
10G/40G/100G optical ethernet
3G-SDI/12G-SDI/24G-SDI broadcast video
OE/NC 1 6 VDD Servers, switches, storage, NICs, search
acceleration
Test and measurement
NC/OE 2 5 CLK-
Clock and data recovery
FPGA/ASIC clocking
3 4 CLK+
GND
(Top View)
Fixed Frequency
Pin # Descriptions
Frequency Flexible
Low
Crystal
DSPLL
Noise
1, 2 Selectable via ordering option
Driver
DCO
OE = Output enable; NC = No connect
Digital Digital
OSC
Phase Error
Phase Loop
Cancellation
Detector Filter
3 GND = Ground
Flexible
Phase Error
Formats,
1.8V 3.3V
4 CLK+ = Clock output
Fractional
Operation
Divider
NVM
5 CLK- = Complementary clock output. Not used
Control Power Supply Regulation
for CMOS.
6 VDD = Power supply Output Enable Built-in Power Supply
(Pin Control) Noise Rejection
silabs.com | Building a more connected world. Rev. 1.1 Si540 Data Sheet
Ordering Guide
1. Ordering Guide
The Si540 XO supports a variety of options including frequency, output format, and OE pin location/polarity, as shown in the chart
below. Specific device configurations are programmed into the part at time of shipment, and samples are available in 1-2 weeks. Silicon
Laboratories provides an online part number configuration utility to simplify this process. Refer to www.silabs.com/oscillators to access
this tool and for further ordering instructions.
2
XO Series Description Temp Stability Total Stability Package Temperature Grade
540 Single Frequency A A 5x7 mm G -40 to 85 C
20 ppm 50 ppm
B B 3.2x5 mm
10 ppm 25 ppm
C C 2.5x3.2 mm
7 ppm 20 ppm
540 A A A - - - - - - - A B G R
Device Revision
Order
Signal Format VDD Range
OE Pin OE Polarity
Option
Reel
LVPECL 2.5, 3.3 V A
A Pin 1 Active High
R Tape and Reel
LVDS 1.8, 2.5, 3.3 V B B Pin 1 Active Low
<Blank> Coil Tape
CMOS 1.8, 2.5, 3.3 V C
C Pin 2 Active High
CML 1.8, 2.5, 3.3 V D D Pin 2 Active Low
3
Frequency Code Description
HCSL 1.8, 2.5, 3.3 V E
Mxxxxxx FCLK < 1 MHz
Dual CMOS
1.8, 2.5, 3.3 V F
xMxxxxx 1 MHz F CLK < 10 MHz
(In-Phase)
xxMxxxx 10 MHz F CLK < 100 MHz
Dual CMOS
1.8, 2.5, 3.3 V G
(Complementary) xxxMxxx 100 MHz F CLK < 1000 MHz
1
Custom 1.8, 2.5, 3.3 V X xxxxMxx 1000 MHz F CLK 1500 MHz
xxxxxx Custom code if F CLK > 6 digits
Notes:
1. Contact Silicon Labs for non-standard configurations.
2. Total stability includes temp stability, initial accuracy, load pulling, VDD variation, and 20 year aging at 70 C.
3. For example: 156.25 MHz = 156M250; 25 MHz = 25M0000. Create custom part numbers at www.silabs.com/oscillators.
1.1 Technical Support
Frequently Asked Questions (FAQ) www.silabs.com/Si540-FAQ
Oscillator Phase Noise Lookup Utility www.silabs.com/oscillator-phase-noise-lookup
Quality and Reliability www.silabs.com/quality
Development Kits www.silabs.com/oscillator-tools
silabs.com | Building a more connected world. Rev. 1.1 | 2