Ultra Series Crystal Oscillator Si541 Data Sheet Ultra Low Jitter Dual Any-Frequency XO (125 fs), 0.2 to 1500 MHz th The Si541 Ultra Series oscillator utilizes Silicon Laboratories advanced 4 gen- KEY FEATURES eration DSPLL technology to provide an ultra-low jitter, low phase noise clock at two selectable frequencies. The device is factory-programmed to provide any Available with any two selectable frequencies two selectable frequencies from 0.2 to 1500 MHz with <1 ppb resolution and from 0.2 MHz to 1500 MHz maintains exceptionally low jitter for both integer and fractional frequencies across Very low jitter: 125 fs Typ RMS its operating range. The Si541 offers excellent reliability and frequency stability (12 kHz 20 MHz) as well as guaranteed aging performance. On-chip power supply filtering provides Excellent PSNR and supply noise immunity: industry-leading power supply noise rejection, simplifying the task of generating 80 dBc Typ low jitter clocks in noisy systems that use switched-mode power supplies. Offered in industry-standard footprints, the Si541 has a dramatically simplified supply chain 7 ppm stability option (-40 to 85 C) that enables Silicon Labs to ship custom frequency samples 1-2 weeks after 3.3 V, 2.5 V and 1.8 V V supply operation DD receipt of order. Unlike a traditional XO, where a different crystal is required for from the same part number each output frequency, the Si541 uses one simple crystal and a DSPLL IC-based LVPECL, LVDS, CML, HCSL, CMOS, and approach to provide the desired output frequencies. This process also guarantees Dual CMOS output options 100% electrical testing of every device. The Si541 is factory-configurable for a 2.5x3.2, 3.2x5, 5x7 mm package options wide variety of user specifications, including frequency, output format, and OE Any custom frequency available with 1-2 pin location/polarity. Specific configurations are factory-programmed at time of week lead times shipment, eliminating the long lead times associated with custom oscillators. APPLICATIONS Pin Assignments 100G/200G/400G OTN, coherent optics OE/FS 1 6 VDD 10G/40G/100G optical ethernet 3G-SDI/12G-SDI/24G-SDI broadcast video 2 5 CLK- FS/OE Servers, switches, storage, NICs, search acceleration GND 3 4 CLK+ Test and measurement Clock and data recovery (Top View) FPGA/ASIC clocking Fixed Frequency Pin Descriptions Frequency Flexible Low Crystal DSPLL Noise 1, 2 Selectable via ordering option Driver DCO OE = Output enable FS = Frequency Select Digital Digital OSC Phase Error Phase Loop Cancellation Detector Filter 3 GND = Ground Flexible Phase Error Formats, 4 CLK+ = Clock output 1.8V 3.3V Fractional Operation Divider 5 CLK- = Complementary clock output. Not used NVM for CMOS. Control Power Supply Regulation 6 VDD = Power supply OE, Frequency Select Built-in Power Supply (Pin Control) Noise Rejection Skyworks Solutions, Inc. Phone 781 376-3000 Fax 781 376-3100 sales skyworksinc.com www.skyworksinc.com 1 Rev. 1.3 Skyworks Proprietary Information Products and Product Information are Subject to Change Without Notice August 23, 2021 1Si541 Data Sheet Ordering Guide 1. Ordering Guide The Si541 XO supports a variety of options including frequency, output format, and OE pin location/polarity, as shown in the chart below. Specific device configurations are programmed into the part at time of shipment, and samples are available in 1-2 weeks. Silicon Laboratories provides an online part number configuration utility to simplify this process. Refer to www.silabs.com/oscillators to access this tool and for further ordering instructions. 2 XO Series Description Temp Stability Total Stability Package Temperature Grade 541 Dual Frequency A 20 ppm 50 ppm A 5x7 mm G -40 to 85 C B 3.2x5 mm B 10 ppm 25 ppm C 2.5x3.2 mm C 7 ppm 20 ppm 541 A A A - - - - - - A C G R Device Revision OE FS Order OE Polarity Signal Format VDD Range Pin Pin Option A Pin 1 Active High Pin 2 Reel LVPECL 2.5, 3.3 V A B Pin 1 Active Low Pin 2 R Tape and Reel LVDS 1.8, 2.5, 3.3 V B C Pin 2 Active High Pin 1 <Blank> Coil Tape CMOS 1.8, 2.5, 3.3 V C D Pin 2 Active Low Pin 1 CML 1.8, 2.5, 3.3 V D 3 HCSL 1.8, 2.5, 3.3 V E Frequency Code Description Dual CMOS 1.8, 2.5, 3.3 V F (In-Phase) Two unique frequencies can be specified within the supported range of the selected Dual CMOS 1.8, 2.5, 3.3 V G signal format. Either frequency can be (Complementary) xxxxxx assigned to FS=0 or FS=1. A six digit numeric code will be assigned for the specific HCSL-Fast 1.8, 2.5, 3.3 V H combination of frequencies. 1 Custom 1.8, 2.5, 3.3 V X Notes: 1. Contact Silicon Labs for non-standard configurations. 2. Total stability includes temp stability, initial accuracy, load pulling, VDD variation, and 20 year aging at 70 C. 3. Create custom part numbers at www.silabs.com/oscillators. 1.1 Technical Support Frequently Asked Questions (FAQ) www.silabs.com/Si541-FAQ Oscillator Phase Noise Lookup Utility www.silabs.com/oscillator-phase-noise-lookup Quality and Reliability www.silabs.com/quality Development Kits www.silabs.com/oscillator-tools Skyworks Solutions, Inc. Phone 781 376-3000 Fax 781 376-3100 sales skyworksinc.com www.skyworksinc.com 2 Rev. 1.3 Skyworks Proprietary Information Products and Product Information are Subject to Change Without Notice August 23, 2021 2