Ultra Series Crystal Oscillator (VCXO) Si565 Data Sheet Ultra Low Jitter Any-Frequency VCXO (100 fs), 0.2 to 3000 KEY FEATURES MHz Available with any frequency from 200 kHz to The Si565 Ultra Series voltage-controlled crystal oscillator utilizes Skyworks 3000 MHz th Solutions advanced 4 generation DSPLL technology to provide an ultra-low Ultra low jitter: 100 fs RMS typical jitter, low phase noise clock at any output frequency. The device is factory-pro- (12 kHz 20 MHz) grammed to any frequency from 0.2 to 3000 MHz with <1 ppb resolution and Excellent PSNR and supply noise immunity: maintains exceptionally low jitter for both integer and fractional frequencies 80 dBc Typ across its operating range. On-chip power supply filtering provides industry-lead- 3.3 V, 2.5 V and 1.8 V V supply operation DD ing power supply noise rejection, simplifying the task of generating low jitter from the same part number clocks in noisy systems that use switched-mode power supplies. Offered in in- LVPECL, LVDS, CML, HCSL, CMOS, and Dual dustry-standard footprints, the Si565 has a dramatically simplified supply chain CMOS output options that enables Silicon Labs to ship custom frequency samples 1-2 weeks after 2.5x3.2, 3.2x5, 5x7 mm package options receipt of order. Unlike a traditional XO, where a different crystal is required for Samples available with 1-2 week lead times each output frequency, the Si565 uses one simple crystal and a DSPLL IC-based approach to provide the desired output frequency. The Si565 is factory-configura- APPLICATIONS ble for a wide variety of user specifications, including frequency, output format, and OE pin location/polarity. Specific configurations are factory-programmed at 100G/200G/400G OTN, coherent optics time of shipment, eliminating the long lead times associated with custom oscilla- tors. 10G/25G/40G/100G Ethernet 56G/112G PAM4 clocking Pin Assignments 3G-SDI/12G-SDI/24G-SDI broadcast video VC 1 6 VDD Servers, switches, storage, NICs, search acceleration OE 2 5 CLK Test and measurement FPGA/ASIC clocking GND 3 4 CLK+ 5 x 7 mm and 3.2 x 5 mm 2.5 x 3.2 mm (Top View) Fixed Frequency Frequency Flexible Pin Descriptions Low Crystal DSPLL Noise Driver DCO 1 VC = Voltage Control Pin Digital Digital OSC Phase Error Phase Loop Cancellation Detector Filter 2 OE = Output enable Flexible Phase Error Formats, 1.8V 3.3V Fractional Operation 3 GND = Ground Divider Vc ADC Control NVM Power Supply Regulation 4 CLK+ = Clock output Output Enable Built-in Power Supply 5 CLK- = Complementary clock output. Not used for CMOS. (Pin Control) Noise Rejection 6 VDD = Power supply Skyworks Solutions, Inc. Phone 781 376-3000 Fax 781 376-3100 sales skyworksinc.com www.skyworksinc.com 1 Rev. 1.3 Skyworks Proprietary Information Products and Product Information are Subject to Change Without Notice December 3, 2021 1Si565 Data Sheet Ordering Guide 1. Ordering Guide The Si565 VCXO supports a variety of options including frequency, output format, and OE pin location/polarity, as shown in the chart below. Specific device configurations are programmed into the part at time of shipment, and samples are available in 1-2 weeks. Sky- works Solutions provides an online part number configuration utility to simplify this process. Refer to