Si2401 V.22BIS ISOMODEM WITH INTEGRATED GLOBAL DAA Features Data modem formats Integrated third-generation DAA 2400 bps: V.22bis Fewer external components required 1200 bps: V.22, V.23, Bell 212A Over 5000 V capacitive isolation 300 bps: V.21, Bell 103 Parallel phone detect Fast connect and V.23 reversing Globally-compliant line interface SIA and other security protocols AT command set support 27 MHz CLKIN support Call progress support Caller ID detection and decoding 3.3 V Power Ordering Information UART with flow control Lead-free, RoHS-compliant See page 72. packages Applications Pin Assignments Set-top boxes ATM terminals Medical monitoring Point-of-sale Security systems Power meters Si2401 CLKIN/XTALI 1 16 GPIO1/EOFR Description XTALO 2 15 GPIO2/CD 3 14 GPIO3/ESC GPIO5/RI The Si2401 ISOmodem is a complete, two-chip 2400 bps modem integrating V 4 13 V D A Silicon Labs third-generation direct access arrangement (DAA), which provides a RXD 5 12 GND globally-programmable telephone line interface with an unprecedented level of TXD 6 11 GPIO4/INT/AOUT integration. Available in two 16-pin SOIC packages, this compact solution CTS 7 10 C1A eliminates the need for a separate DSP data pump, modem controller, codec, 8 9 C2A RESET isolation transformer, relay, opto-isolators, and 24 wire hybrid. The Si2401 provides conventional data formats at connect rates of up to 2400 bps with full- duplex operation over the Public Switched Telephone Network (PSTN). Si3010 Additionally, the Si2401 is fully-programmable to meet global standards with a 1 16 DCT2 QE single design. Other features include fast connect times for electronic point-of- DCT 2 15 IGND sale (EPOS) applications and alarm protocols for security systems. The device is 3 14 DCT3 RX ideal for embedded modem applications due to its small size, low external IB 4 13 QB component count, and low power consumption. 5 12 QE2 C1B Functional Block Diagram C2B 6 11 SC VREG 7 10 VREG2 8 Si2401 Si3010 RNG1 9 RNG2 RX RXD TXD Controller (AT Decoder, IB U.S. Patent 5,870,046 CTS Call Progress) SC Hybrid, AC DCT and DC U.S. Patent 6,061,009 RESET VREG Terminations VREG2 Isolation Other patents pending EOFR/GPIO1 DCT2 Interface DSP DCT3 CD/GPIO2 (Data Pump) Control ESC/GPIO3 Interface INT/GPIO4 RNG1 RI/GPIO5 Ring Detect RNG2 QB QE XTALI Clock Off-Hook QE2 Interface XOUT Rev. 1.01 8/16 Copyright 2016 by Silicon Laboratories Si2401 UART Isolation InterfaceSi2401 2 Rev. 1.01