Si4430/31/32-B1 Si4430/31/32 ISM TRANSCEIVER Features Wake-up timer Frequency Range Auto-frequency calibration (AFC) 240930 MHz (Si4431/32) Power-on-reset (POR) 900960 MHz (Si4430) Antenna diversity and TR switch Sensitivity = 121 dBm control Output power range Configurable packet handler +20 dBm Max (Si4432) Preamble detector +13 dBm Max (Si4430/31) TX and RX 64 byte FIFOs Low Power Consumption Low battery detector 18.5 mA receive Ordering Information: Temperature sensor and 8-bit ADC 30 mA +13 dBm transmit 40 to +85 C temperature range See page 67. 85 mA +20 dBm transmit Integrated voltage regulators Data Rate = 0.123 to 256 kbps Frequency hopping capability FSK, GFSK, and OOK modulation On-chip crystal tuning Pin Assignments Power Supply = 1.8 to 3.6 V 20-Pin QFN package Ultra low power shutdown mode Low BOM Si4430/31/32 Digital RSSI Applications 20 19 18 17 VDD RF 1 16 Remote control Remote meter reading TX 2 15 SCLK Home security & alarm Remote keyless entry Telemetry Home automation RXp 3 14 SDI GND Personal data logging Industrial control PAD RXn 4 13 SDO Toy control Sensor networks Tire pressure monitoring Health monitors NC 5 12 VDD DIG Wireless PC peripherals Tag readers 6 11 NC 7 8 9 10 Description Silicon Laboratories Si4430/31/32 devices are highly integrated, single chip wireless ISM transceivers. The high-performance EZRadioPRO family includes Patents pending a complete line of transmitters, receivers, and transceivers allowing the RF system designer to choose the optimal wireless part for their application. The Si4430/31/32s high level of integration offers reduced BOM cost while simplifying the overall system design. The extremely low receive sensitivity (121dBm) coupled with industry leading +20dBm output power ensures extended range and improved link performance. Built-in antenna diversity and support for frequency hopping can be used to further extend range and enhance performance. The Si4430/31/32 offers advanced radio features including continuous frequency coverage from 240960 MHz in 156 Hz or 312 Hz steps allowing precise tuning control. Additional system features such as an automatic wake-up timer, low battery detector, 64 byte TX/RX FIFOs, automatic packet handling, and preamble detection reduce overall current consumption and allow the use of lower-cost system MCUs. An integrated temperature sensor, general purpose ADC, power- on-reset (POR), and GPIOs further reduce overall system cost and size. The Si4430/31/32s digital receive architecture features a high-performance ADC and DSP based modem which performs demodulation, filtering, and packet handling for increased flexibility and performance. The direct digital transmit modulation and automatic PA power ramping ensure precise transmit modulation and reduced spectral spreading ensuring compliance with global regulations including FCC, ETSI, ARIB, and 802.15.4d regulations. An easy-to-use calculator is provided to quickly configure the radio settings, simplifying customer s system design and reducing time to market. Rev 1.1 10/10 Copyright 2010 by Silicon Laboratories Si4430/31/32 Not Recommended for New Designs ANT SDN GPIO 0 GPIO 1 XIN GPIO 2 XOUT VR DIG nIRQ nSELSi4430/31/32-B1 Functional Block Diagram 2 Rev 1.1 Not Recommended for New Designs