Si8920ISO-EVB Si8920ISO-EVB USERS GUIDE Description Si8920ISO-EVB Overview This document describes the operation of the Si8920ISO-EVB. Kit Contents The Si8920ISO Evaluation Kit contains the following items: Si8920ISO-EVB. Si8920BC-IP installed on the evaluation board. Rev. 0.1 8/15 Copyright 2015 by Silicon Laboratories Si8920ISO-EVBSi8920ISO-EVB 1. Hardware Overview and Setup 1.1. Connecting to the EVB Power the EVB by applying isolated 3.0 to 5.5 V supplies to terminal blocks J1 and J2. LEDs D21 and D22 will DC light up. Use separate test points TP1, TP2, TP3, and TP4 for observing VDDA, GNDA, VDDB, and GNDB, respectively. Note: DO NOT place jumpers across JP10, JP11, or JP12. These are redundant test points for VDDA, VDDB, and AOP/AON, respectively. There are three connection points for applying and observing differential signals to the inputs of Si8920: 1. Through a two conductor ribbon cable to 2x1 header JP8. 2. Clipping wires to test points TP7 and TP8. 3. Soldering wires directly to through holes located at TP9 and TP10. The same connector options are available for observing and taking the output signals off circuit board: 1. Through a two conductor ribbon cable at 2x1 header JP12. 2. Clipping wires to test points TP5 and TP6. 3. Soldering wires directly through holes located at TP11 and TP12. 1.2. Driving Si8920 Inputs Drive the inputs with a low impedance source. The Si8920 has a typical input impedance of 37.2 k . A high source impedance will affect the gain error of the amplifier. The maximum specified differential voltage is 200 mV and the common mode must be within 250 mV to 1 V with respect to GNDA. Note: When driving inputs from a single-ended source, short the unused input to GNDA. If driving AIP input, install 0 resistor across C23 pads. If driving AIN input, install a 0 resistor across C24 pads. 2 Rev. 0.1