Preliminary
SiT1533
Ultra-Low Power 32.768 kHz XTAL Replacement in 2.0 x 1.2 mm SMD
The Smart Timing Choice
The Smart Timing Choice
Features Applications
[1]
Small SMD package: 2.0 x 1.2 mm (2012) Mobile Phones
Pin-compatible to 2012 XTAL SMD package Tablets
Ultra-low power: <1A Health and Wellness Monitors
Supports coin-cell or super-cap battery backup voltages Fitness Watches
Vdd supply range: 1.5V to 3.63V over -40C to +85C Sport Video Cams
Oscillator output eliminates external load caps Wireless Keypads
NanoDrive programmable output swing for lowest power Ultra-Small Notebook PC
Internal filtering eliminates external Vdd bypass cap Pulse-per-Second (pps) Timekeeping
Fixed 32.768 kHz output frequency RTC Reference Clock
<20 PPM initial stability Battery Management Timekeeping
<100 PPM stability over -40C to +85C
Pb-free, RoHS and REACH compliant
2
Note: 1. For the smallest 32 kHz XO in CSP (1.2mm ), consider the SiT1532
Electrical Characteristics
Parameter Symbol Min. Typ. Max. Unit Condition
Frequency and Stability
Fixed Output Frequency Fout 32.768 kHz
Frequency Stability
T = 25C, Vdd: 1.5V 3.63V
20
A
T = -10C to +70C, Vdd: 1.5V 3.63V. Stability includes initial,
A
75
power supply, and temperature stability components.
[2]
F_stab PPM
Frequency Stability
T = -40C to +85C, Vdd: 1.5V 3.63V. Stability includes initial,
A
100
power supply, and temperature stability components.
T = 10C to +70C, Vdd: 1.2V 1.5V. Stability includes initial,
A
250
power supply, and temperature stability components.
25C Aging -3 3 PPM 1st Year
Supply Voltage and Current Consumption
T = 10C to +70C
1.2 3.63 V
A
Operating Supply Voltage Vdd
T = -40C to +85C
1.5 3.63 V
A
Power Supply Reset Voltage Reset 0.3 V
0.9 T = 25C, Vdd: 1.5V 3.63V. No load
A
[3, 4]
Core Operating Current Idd 1.3 A T = -10C to +70C, Vdd max: 3.63V. No load
A
1.35 T = -40C to +85C, Vdd max: 3.63V. No load
A
[3]
T = -40C to +85C, Vdd: 1.5V 3.63V. No load
Idd_out 0.065 0.125 A/Vpp
Output Stage Operating Current A
t_Vdd_
Power-Supply Ramp 100 ms T = -40C to +85C, 0 to 100% Vdd
A
Ramp
T at Power-up T = -40C to +85C
T_start 150 300 ms
START-UP A
Operating Temperature Range
Commercial Temperature -10 70 C
T_use
Industrial Temperature -40 85 C
LVCMOS Output Option, T = -40C to +85C, typical value is T = 25C
A A
Output Rise/Fall Time tr, tf 100 200 ns 10-90%, 15 pF load, Vdd = 1.5V to 3.63V
Output Clock Duty Cycle DC 48 52 %
Vdd: 1.5V 3.63V. I = -10A, 15 pF
Output Voltage High VOH 90% V
OH
Vdd: 1.5V 3.63V. I = 10 A, 15 pF
Output Voltage Low VOL 10% V
OL
NanoDrive Programmable, Reduced Swing Output
Output Rise/Fall Time tf, tf 200 ns 10-90%, 15 pF Load
Output Clock Duty Cycle DC 48 52 %
AC-coupled Programmable
V_sw 0.25 0.80 V Vdd: 1.2V 3.63V, 15 pF Load, 10 pF, I / I = 0.2uA
OH OL
Output Swing
DC-Biased Programmable
VOH 0.5 1.20 V Vdd: 1.2V 3.63V. I = -0.2 A, 10 pF Load
OH
Output Voltage High Range
DC-Biased Programmable
VOL 0.35 0.80 V Vdd: 1.2V 3.63V. I = 0.2 A, 10 pF Load
OH
Output Voltage Low Range
Notes:
2. Stability is specified for two operating voltage ranges. Stability progressively degrades with supply voltage below 1.5V.
3. Core operating current does not include output driver operating current or load current.
4. To derive total operating current (no load), add core operating current + (0.065 A/V) * (peak-to-peak output Voltage swing).
SiTime Corporation 990 Almanor Avenue Sunnyvale, CA 94085 (408) 328-4400 www.sitime.com
Rev 0.77 Revised July 18, 2013SiT1533
Ultra-Low Power 32.768 kHz XTAL Replacement in 2.0 x 1.2 mm SMD
The Smart Timing Choice
The Smart Timing Choice
Electrical Characteristics (continued)
Parameter Symbol Min. Typ. Max. Unit Condition
Jitter Performance (T = 25C, Vdd = 1.5V to 2.0V, unless otherwise stated)
A
Period Jitter T_djitt 45 ns N = 10,000
RMS
Pin Configuration
Pin Symbol I/O Functionality
SMD Package (Top View)
No Connect. Will not respond to any input signal. This pin is typically
No Connect,
1NC connected to the receiving ICs X Out pin. In this case, the SiT1533
dont care
will not be affected by the signal on this pin.
Vdd
Power Supply
2GND Connect to ground.
Ground
4
Oscillator clock output. The CLK Out is typically connected to the
receiving ICs X IN pin. The SiT1533 oscillator output includes an
NC 1 3
internal driver. As a result, the output swing and operation is not CLK Out
3CLK Out OUT
dependent on capacitive loading. This makes the output much more
flexible, layout independent, and robust under changing environ-
2
mental and manufacturing conditions.
Connect to power supply 1.5V Vdd 3.63V for operation over -40C
GND
to +85C temperature range. Under normal operating conditions, Vdd
does not require external bypass/decoupling capacitor(s).
4 Vdd Power Supply
Contact factory for applications that require a wider operating supply
voltage range.
System Block Diagram
MEMS Resonator
NC Control Regulators Vdd
Trim Prog Prog
Ultra-Low
Sustaining Ultra-Low
GND Divider CLK Out
Power Power Driver
Amp
PLL
Figure 1.
Absolute Maximum
Attempted operation outside the absolute maximum ratings of the part may cause permanent damage to the part. Actual perfor-
mance of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings.
Parameter Symbol Test Condition Value Unit
Power Supply Voltage Range (Vdd) Vdd -0.5 to 4
ESD Protection HBM 100pF, 1.5k 2000
ESD Protection CDM, 25C 750
ESD Protection MM, 25C 200
Power Supply Voltage Range (Vdd) Vdd -0.5 to 4
Latch-up Tolerance JESD78 Compliant
Mechanical Shock Resistance F/F Mil 883, Method 2002 TBD g
Mechanical Vibration Resistance F/F Mil 883, Method 2005 TBD g
2012 SMD Junction Temperature TBD
Storage Temperature -65C to 150C
Thermal Consideration
JA, 4 Layer Board JA, 2 Layer Board JC, Bottom
Package (C/W) (C/W) (C/W)
2012 SMD TBD
Rev. 0.77 Page 2 of 7 www.sitime.com