SiT1534 Ultra-Small, Ultra-Low Power 1 Hz 32.768 kHz Programmable Oscillator Features Applications Factory programmable from 32.768 kHz down to 1 Hz Mobile Phones <20 ppm frequency tolerance Tablets Smallest footprint in chip-scale (CSP): 1.5 x 0.8 mm Health and Wellness Monitors Pin-compatible to 2.0 x 1.2 mm XTAL SMD package Fitness Watches Ultra-low power: <1 A Sport Video Cams Vdd supply range: 1.5 V to 3.63 V over -55C to +85C Wireless Keypads Supports low-voltage battery backup from a coin cell or Ultra-Small Notebook PC supercap Pulse-per-Second (pps) Timekeeping Oscillator output eliminates external load caps RTC Reference Clock Internal filtering eliminates external Vdd bypass cap Battery Management Timekeeping NanoDrive programmable output swing for lowest power Pb-free, RoHS and REACH compliant Electrical Specifications Table 1. Electrical Characteristics Parameter Symbol Min. Typ. Max. Unit Condition Frequency and Stability Programmable Output Frequency 1.00 32768.0 Hz Factory programmed between 1 and 32.768 kHz in powers of 2 Frequency Stability 1 F tol 20 ppm T = 25C, post reflow, includes underfill, Vdd: 1.5 V 3.63 V Frequency Tolerance A 2 75 ppm T = -10C to +70C, Vdd: 1.5 V 3.63 V Frequency Stability A F stab 100 T = -40C to +85C, Vdd: 1.5 V 3.63 V A 150 T = -55C to +85C, Vdd: 1.5 V 3.63 V A 250 T = -10C to +70C, Vdd: 1.2 V 1.5 V A st 25C Aging -1 1 ppm 1 Year Supply Voltage and Current Consumption Operating Supply Voltage Vdd 1.2 3.63 V T = -10C to +70C A 1.5 3.63 V T = -55C to +85C A 3 Idd 0.9 A T = 25C, Vdd: 1.8 V. No load Core Operating Current A 1.3 T = -10C to +70C, Vdd max: 3.63 V. No load A 1.4 T = -55C to +85C, Vdd max: 3.63 V. No load A 3 Idd out 0.065 0.125 A/Vpp T = -40C to +85C, Vdd: 1.5 V 3.63 V. No load Output Stage Operating Current A Power-Supply Ramp t Vdd 100 ms Over temperature, 0 to 90% Ramp 4 t start 300 + 1 ms T = 25C 10C, valid output Start-up Time A period 500 + 1 T = -55C to +85C, valid output A period Operating Temperature Range Commercial Temperature T use -10 70 C Industrial Temperature -40 85 C Extended Cold Industrial -55 85 C Temperature Notes: 1. Measured peak-to-peak. Tested with Agilent 53132A frequency counter. Due to the low operating frequency, the gate time must be 100 ms to ensure an accurate frequency measurement. 2. Measured peak-to-peak. Inclusive of Initial Tolerance at 25C, and variations over operating temperature, rated power supply voltage and load. Stability is specified for two operating voltage ranges. Stability progressively degrades with supply voltage below 1.5 V. 3. Core operating current does not include output driver operating current or load current. To derive total operating current (no load), add core operating current + (0.065 A/V) * (output voltage swing). 4. Measured from the time Vdd reaches 1.5 V. Rev 1.41 November 23, 2020 www.sitime.com SiT1534 Ultra-Small, Ultra-Low Power 1 Hz 32.768 kHz Programmable Oscillator Table 1. Electrical Characteristics (continued) Parameter Symbol Min. Typ. Max. Unit Condition LVCMOS Output Option, T = -55C to +85C, typical value is T = 25C A A Output Rise/Fall Time tr, tf 100 200 ns 10-90% (Vdd), 15 pF load, Vdd = 1.5 V to 3.63 V Output Clock Duty Cycle DC 48 52 % Output Voltage High VOH 90% V Vdd: 1.5 V 3.63 V. I = -10 A, 15 pF OH Output Voltage Low VOL 10% V Vdd: 1.5 V 3.63 V. I = 10 A, 15 pF OL NanoDrive Programmable, Reduced Swing Output Output Rise/Fall Time tf, tf 200 ns 30-70% (V /V ), 10 pF Load OL OH Output Clock Duty Cycle DC 48 52 % AC-coupled Programmable V sw 0.20 to V SiT1534 does not internally AC-couple. This output description Output Swing 0.80 is intended for a receiver that is AC-coupled. See Table 6 for acceptable NanoDrive swing options Vdd: 1.5 V 3.63 V, 10 pF Load, I / I = 0.2 A. OH OL DC-Biased Programmable VOH 0.60 to V Vdd: 1.5 V 3.63 V. I = -0.2 A, 10 pF Load. See Table 5 for OH Output Voltage High Range 1.225 acceptable V /V setting levels OH OL DC-Biased Programmable VOL 0.35 to V Vdd: 1.5 V 3.63 V. I = 0.2 A, 10 pF Load. See Table 5 for OL Output Voltage Low Range 0.80 acceptable V /V setting levels OH OL Programmable Output Voltage -0.055 0.055 V T = -40C to +85C, Vdd = 1.5 V to 3.63 V A Swing Tolerance Jitter Performance Period Jitter T djitt 35 ns Cycles = 10,000, T = 25C, Vdd = 1.5 V 3.63 V A RMS Table 2. Pin Configuration (SMD) Pin Symbol I/O Functionality SMD Package (Top View) No Connect. Will not respond to any input signal. When the SiT1534 Vdd is used as an alternative to an XTAL, this pin is typically connected No Connect, 1 NC dont care to the receiving ICs X Out pin. In this case, the SiT1534 will not be 4 affected by the signal on this pin. 1 3 NC CLK Out Power Supply 2 GND Connect to ground. Ground 2 Oscillator clock output. When the SiT1534 is used as an alternative GND to an XTAL, the CLK Out is typically connected to the receiving ICs 3 CLK Out OUT X IN pin. No need for load capacitors. The output driver is independent of capacitive loading. Figure 1. Pin Assignments (SMD) Connect to power supply 1.2 V Vdd 3.63 V. Under normal operating conditions, Vdd does not require external bypass/decoupling capacitor(s). 4 Vdd Power Supply For more information about the internal power-supply filtering, see the Power Supply Noise Immunity section in the detailed description. Contact SiTime for applications that require a wider operating supply voltage range. Table 3. Pin Configuration (CSP) Pin Symbol I/O Functionality CSP Package (Top View) Power Supply Connect to ground. Acceptable to connect pin 1 and 4 together. Both 1, 4 GND Ground pins must be connected to GND. GND 1 4 GND Oscillator clock output. The CLK can drive into a Ref CLK input or into an ASIC or chip-sets 32kHz XTAL input. When driving into an ASIC 2 CLK Out OUT or chip-set oscillator input (X IN and X Out), the CLK Out is typically connected directly to the XTAL IN pin. No need for load capacitors. The output driver is intended to be insensitive to capacitive loading. CLK Out 2 3 Vdd Connect to power supply 1.2 V Vdd 3.63 V. Under normal operating conditions, Vdd does not require external bypass/decoupling capacitor(s). For more information about the Figure 2. Pin Assignments internal power-supply filtering, see the Power Supply Noise Immunity 3 Vdd Power Supply (CSP) section in the detailed description. Contact SiTime for applications that require a wider operating supply voltage range. Rev 1.41 Page 2 of 13 www.sitime.com