SiT8009 High Frequency, Low Power Oscillator The Smart Timing Choice The Smart Timing Choice Features Applications Any frequency between 115 MHz and 137 MHz accurate to 6 decimal Ideal for GPON/GPON, network switches, routers. servers, places embedded systems Operating temperature from -40C to 85C. Refer to SiT8918 and Ideal for Ethernet, PCI-E, DDR, etc. SiT8920 for high temperature options Excellent total frequency stability as low as 20 PPM Low power consumption of 4.8 mA (typical in 1.8V) Output enable or standby mode LVCMOS/HCMOS compatible output Industry-standard packages: 2.0 x 1.6, 2.5 x 2.0, 3.2 x 2.5, 5.0 x 3.2, 7.0 x 5.0 mm x mm Instant samples with Time Machine II and field programmable oscillators Pb-free, RoHS and REACH compliant 1 Electrical Characteristics Parameter and Conditions Symbol Min. Typ. Max. Unit Condition Frequency Range Output Frequency Range f 115 137 MHz Frequency Stability and Aging Frequency Stability F stab -20 +20 PPM Inclusive of Initial tolerance at 25C, 1st year aging at 25C, and variations over operating temperature, rated power supply -25 +25 PPM voltage and load. -50 +50 PPM Operating Temperature Range Operating Temperature Range T use -20 +70 C Extended Commercial -40 +85 C Industrial Supply Voltage and Current Consumption Supply Voltage Vdd 1.62 1.8 1.98 V Contact SiTime for 1.5V support 2.25 2.5 2.75 V 2.52 2.8 3.08 V 2.7 3.0 3.3 V 2.97 3.3 3.63 V 2.25 3.63 V Current Consumption Idd No load condition, f = 125 MHz, Vdd = 2.8V, 3.0V, 3.3V or 2.25 6.2 7.5 mA to 3.63V 5.4 6.4 mA No load condition, f = 125 MHz, Vdd = 2.5V 4.8 5.6 mA No load condition, f = 125 MHz, Vdd = 1.8V OE Disable Current I OD 4 mA Vdd = 2.5V to 3.3V, OE = GND, output is Weakly Pulled Down 3.8 mA Vdd = 1.8V, OE = GND, output is Weakly Pulled Down Standby Current I std 2.6 4.3 A ST = GND, Vdd = 2.8V to 3.3V, Output is Weakly Pulled Down 1.4 2.5 A ST = GND, Vdd = 2.5V, Output is Weakly Pulled Down 0.6 1.3 A ST = GND, Vdd = 1.8V, Output is Weakly Pulled Down LVCMOS Output Characteristics Duty Cycle DC 45 55 % All Vdds Rise/Fall Time Tr, Tf 1 2 ns Vdd = 2.5V, 2.8V, 3.0V or 3.3V, 20% - 80% 1.3 2.5 ns Vdd =1.8V, 20% - 80% 0.8 2 ns Vdd = 2.25V - 3.63V, 20% - 80% Output High Voltage VOH 90% Vdd IOH = -4 mA (Vdd = 3.0V or 3.3V) Output Low Voltage VOL 10% Vdd IOL = 4 mA (Vdd = 3.0V or 3.3V) Input Characteristics Input High Voltage VIH 70% Vdd Pin 1, OE or ST Input Low Voltage VIL 30% Vdd Pin 1, OE or ST Input Pull-up Impedence Z in 87 100 k Pin 1, OE logic high or logic low, or ST logic high 2 M Pin 1, ST logic low Note: 1. All electrical specifications in the above table are specified with 15 pF output load and for all Vdd(s) unless otherwise stated. SiTime Corporation 990 Almanor Avenue Sunnyvale, CA 94085 (408) 328-4400 www.sitime.com Rev. 1.0 Revised June 12, 2013SiT8009 High Frequency, Low Power Oscillator The Smart Timing Choice The Smart Timing Choice 1 Electrical Characteristics (continued) Parameter and Conditions Symbol Min. Typ. Max. Unit Condition Startup and Resume Timing Startup Time T start 5 ms Measured from the time Vdd reaches its rated minimum value Enable/Disable Time T oe 130 ns f = 115 MHz. For other frequencies, T oe = 100 ns + 3 * cycles Resume Time T resume 5 ms Measured from the time ST pin crosses 50% threshold Jitter RMS Period Jitter T jitt 1.93 3 ps f = 125 MHz, Vdd = 2.5V, 2.8V, 3.0V or 3.3V 1.64 4 ps f = 125 MHz, Vdd = 1.8V RMS Phase Jitter (random) T phj 0.5 0.9 ps Integration bandwidth = 900 kHz to 7.5 MHz 1.3 2 ps Integration bandwidth = 12 kHz to 20 MHz Note: 1. All electrical specifications in the above table are specified with 15 pF output load and for all Vdd(s) unless otherwise stated. Pin Description Pin Symbol Functionality 2 Top View Output H or Open : specified frequency output Enable L: output is high impedance. Only output driver is disabled. 2 OE/ ST H or Open : specified frequency output 1 Standby L: output is low (weak pull down). Device goes to sleep mode. Supply 1 4 OE/ST VDD current reduces to I std. 3 2 GND Power Electrical ground 3 OUT Output Oscillator output 3 2 3 OUT 4 VDD Power Power supply voltage GND Notes: 2. A pull-up resistor of <10 k between OE/ ST pin and Vdd is recommended in high noise environment. 3. A capacitor value of 0.1 F between Vdd and GND is recommended. Absolute Maximum Attempted operation outside the absolute maximum ratings of the part may cause permanent damage to the part. Actual perfor- mance of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings. Parameter Min. Max. Unit Storage Temperature -65 150 C VDD -0.5 4 V Electrostatic Discharge 2000 V Soldering Temperature (follow standard Pb free soldering guidelines) 260 C Junction Temperature 150 C Thermal Consideration JA, 4 Layer Board JA, 2 Layer Board JC, Bottom Package (C/W) (C/W) (C/W) 7050 191 263 30 5032 97 199 24 3225 109 212 27 2520 117 222 26 2016 124 227 26 Environmental Compliance Parameter Condition/Test Method Mechanical Shock MIL-STD-883F, Method 2002 Mechanical Vibration MIL-STD-883F, Method 2007 Temperature Cycle JESD22, Method A104 Solderability MIL-STD-883F, Method 2003 Moisture Sensitivity Level MSL1 260C Rev. 1.0 Page 2 of 11 www.sitime.com