SiT8503 High Performance 200-1000 KHz Oscillator Features, Benefits and Applications 200 - 1000 kHz frequency range (contact SiTime for <200 kHz) Frequency stability as low as 20 PPM LVCMOS/LVTTL compatible output Typical current consumption of 5.7 mA in active mode Standby or output enable modes Four industry-standard packages: 2.5 x 2.0, 3.2 x 2.5, 5.0 x 3.2, 7.0 x 5.0 mm All-silicon device with outstanding reliability of 2 FIT, 10x improvement over quartz-based devices, enhancing system MTBF Outstanding mechanical robustness for portable applications Ultra short lead time Ideal for consumer electronics, audio applications Specifications Electrical Characteristics Parameter Symbol Min. Typ. Max. Unit Condition Output Frequency Range f 200 1000 kHz Contact SiTime for <200 kHz Frequency Stability F stab -20 +20 PPM Inclusive of: Initial stability, operating temperature, rated power, supply voltage change, load change, shock and vibration. -25 +25 PPM -30 +30 PPM 20 PPM available in extended commercial temperature only -50 +50 PPM Aging Ag -1.0 1.0 PPM 1st year at 25C Operating Temperature Range T use -20 +70 C Extended commercial -40 +85 C Industrial Supply Voltage Vdd 1.71 1.8 1.89 V 2.25 2.5 2.75 V 2.52 2.8 3.08 V 2.97 3.3 3.63 V Current Consumption Idd 5.9 6.9 mA No load condition, f = 400 KHz, Vdd = 2.5 V, 2.8 V or 3.3 V 5.7 6.6 mA No load condition, f = 400 KHz, Vdd = 1.8 V Standby Current I std 2.4 4.3 AST = GND, Vdd = 3.3 V, Output is weakly pulled down 1.2 2.2 AST = GND, Vdd = 2.5 or 2.8 V, Output is weakly pulled down 0.4 0.8 AST = GND, Vdd = 1.8 V, Output is weakly pulled down Duty Cycle DC 45 50 55 % All Vdds Rise/Fall Time Tr, Tf 1.0 2.0 ns 20% - 80% Vdd=2.5V or 2.8V, 3.3V, 15pF load 1.3 2.5 ns 20% - 80% Vdd=1.8V, 15pF load Output Voltage High VOH 90% Vdd IOH = -4 mA (Vdd = 3.3 V) IOH = -3 mA (Vdd = 2.8 V and Vdd = 2.5 V) IOH = -2 mA (Vdd = 1.8 V) Output Voltage Low VOL 10% Vdd IOL = 4 mA (Vdd = 3.3 V) IOL = 3 mA (Vdd = 2.8 V and Vdd = 2.5 V) IOL = 2 mA (Vdd = 1.8 V) Output Load Ld 15 pF At maximum frequency and supply voltage. Contact SiTime for higher output load option Input Voltage High VIH 70% Vdd Pin 1, OE or ST Input Voltage Low VIL 30% Vdd Pin 1, OE or ST Startup Time T osc 10 ms Measured from the time Vdd reaches its rated minimum value Resume Time T resume 3 4 ms Measured from the time ST pin crosses 50% threshold RMS Period Jitter T jitt 11 17 ps f = 400 KHz, Vdd = 2.5 V, 2.8 V or 3.3 V 12 17 ps f = 400 KHz, Vdd = 1.8 V SiTime Corporation 990 Almanor Avenue Sunnyvale, CA 94085 (408) 328-4400 www.sitime.com Rev. 1.0 Revised September 1, 2010 SiT8503 High Performance 200-1000 KHz Oscillator Specifications (Cont.) Pin Description Tables Pin 1 Functionality Pin Map OE Pin Connection 1 H or Open : specified frequency output 1 OE/ST L: output is high impedance 2GND 3CLK ST H or Open: specified frequency output 4 VDD L: output is low level (weak pull down). Oscillation stops Absolute Maximum Table Attempted operation outside the absolute maximum ratings of the part may cause permanent damage to the part. Actual performance of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings. Parameter Min. Max. Unit Storage Temperature -65 150 C Vdd -0.5 4 V Electrostatic Discharge 6000 V Theta JA (with copper plane on Vdd and GND) 75 C/W Theta JC (with PCB traces of 0.010 inch to all pins) 24 C/W Soldering Temperature (follow standard Pb free soldering guidelines) 260 C Number of Program Writes 1 NA Program Retention over -40 to 125C, Process, Vdd (0 to 3.65 V) 1,000+ years Environmental Compliance Parameter Condition/Test Method Mechanical Shock MIL-STD-883F, Method 2002 Mechanical Vibration MIL-STD-883F, Method 2007 Temperature Cycle JESD22, Method A104 Solderability MIL-STD-883F, Method 2003 Moisture Sensitivity Level MSL1 260C Startup and Resume Timing Diagram 90% Vdd: 2.5/2.8/3.3 V parts Vdd ST Voltage Vdd 95% Vdd: 1.8 V parts Pin 4 Voltage 50% Vdd T resume T start CLK Output CLK Output T resume: Time to resume from ST T start: Time to start from power-off (ST Mode Only) (ST/OE Mode) Note: 1. In 1.8 V mode, a resistor of <100 k between OE pin and VDD is recommended. Rev. 1.0 Page 2 of 4 www.sitime.com