SiT8920B -55C to +125C Oscillator The Smart Timing Choice The Smart Timing Choice Features Applications Frequencies between 1 MHz and 110 MHz accurate to 6 decimal Ruggedized equipment in harsh operating environment places Operating temperature from -55C to 125C Supply voltage of 1.8V or 2.5V to 3.3V Excellent total frequency stability as low as 20 ppm Low power consumption of 3.5 mA typical at 1.8V LVCMOS/LVTTL compatible output Industry-standard packages: 2.0 x 1.6, 2.5 x 2.0, 3.2 x 2.5, 5.0 x 3.2, 7.0 x 5.0 mm x mm Instant samples with Time Machine II and field programmable oscillators RoHS and REACH compliant, Pb-free, Halogen-free and Antimony-free Electrical Specifications Table 1. Electrical Characteristics All Min and Max limits are specified over temperature and rated operating voltage with 15 pF output load unless otherwise stated. Typical values are at 25C and nominal supply voltage. Parameters Symbol Min. Typ. Max. Unit Condition Frequency Range Output Frequency Range f 1 110 MHz Refer to Table 13 for the exact list of supported frequencies list of supported frequencies Frequency Stability and Aging Frequency Stability F stab -20 +20 ppm Inclusive of Initial tolerance at 25C, 1st year aging at 25C, and variations over operating temperature, rated power supply -25 +25 ppm voltage and load (15 pF 10%). -30 +30 ppm -50 +50 ppm Operating Temperature Range Operating Temperature Range T use -55 +125 C Supply Voltage and Current Consumption Supply Voltage Vdd 1.62 1.8 1.98 V 2.25 2.5 2.75 V 2.52 2.8 3.08 V 2.7 3.0 3.3 V 2.97 3.3 3.63 V 2.25 3.63 V Current Consumption Idd 3.8 4.7 mA No load condition, f = 20 MHz, Vdd = 2.8V, 3.0V or 3.3V 3.6 4.5 mA No load condition, f = 20 MHz, Vdd = 2.5V 3.5 4.5 mA No load condition, f = 20 MHz, Vdd = 1.8V OE Disable Current I od 4.5 mA Vdd = 2.5V to 3.3V, OE = Low, Output in high Z state. 4.3 mA Vdd = 1.8V, OE = Low, Output in high Z state. Standby Current I std 2.6 8.5 A Vdd = 2.8V to 3.3V, ST = Low, Output is weakly pulled down 1.4 5.5 A Vdd = 2.5V, ST = Low, Output is weakly pulled down 0.6 4.0 A Vdd = 1.8V, ST = Low, Output is weakly pulled down LVCMOS Output Characteristics Duty Cycle DC 45 55 % All Vdds Rise/Fall Time Tr, Tf 1.0 2.0 ns Vdd = 2.5V, 2.8V, 3.0V or 3.3V, 20% - 80% 1.3 2.5 ns Vdd =1.8V, 20% - 80% 1.0 3 ns Vdd = 2.25V - 3.63V, 20% - 80% Output High Voltage VOH 90% Vdd IOH = -4 mA (Vdd = 3.0V or 3.3V) IOH = -3 mA (Vdd = 2.8V or 2.5V) IOH = -2 mA (Vdd = 1.8V) Output Low Voltage VOL 10% Vdd IOL = 4 mA (Vdd = 3.0V or 3.3V) IOL = 3 mA (Vdd = 2.8V or 2.5V) IOL = 2 mA (Vdd = 1.8V) SiTime Corporation 990 Almanor Avenue, Sunnyvale, CA 94085 (408) 328-4400 www.sitime.com Rev. 1.01 Revised June 18, 2015SiT8920B -55C to +125C Oscillator The Smart Timing Choice The Smart Timing Choice Table 1. Electrical Characteristics (continued) Parameters Symbol Min. Typ. Max. Unit Condition Input Characteristics Input High Voltage VIH 70% Vdd Pin 1, OE or ST Input Low Voltage VIL 30% Vdd Pin 1, OE or ST Input Pull-up Impedence Z in 50 87 150 k Pin 1, OE logic high or logic low, or ST logic high 2 M Pin 1, ST logic low Startup and Resume Timing Startup Time T start 5 ms Measured from the time Vdd reaches its rated minimum value Enable/Disable Time T oe 130 ns f = 110 MHz. For other frequencies, T oe = 100 ns + 3 * clock periods Resume Time T resume 5 ms Measured from the time ST pin crosses 50% threshold Jitter RMS Period Jitter T jitt 1.6 2.5 ps f = 75MHz, Vdd = 2.5V, 2.8V, 3.0V or 3.3V 1.9 3 ps f = 75MHz, Vdd = 1.8V Peak-to-peak Period Jitter T pk 12 20 ps f = 75MHz, Vdd = 2.5V, 2.8V, 3.0V or 3.3V 14 25 ps f = 75MHz,Vdd = 1.8V RMS Phase Jitter (random) T phj 0.5 0.8 ps f = 75MHz, Integration bandwidth = 900 kHz to 7.5 MHz 1.3 2 ps f = 75MHz, Integration bandwidth = 12 kHz to 20 MHz Table 2. Pin Description Pin Symbol Functionality Top View 1 Output H : specified frequency output Enable L: output is high impedance. Only output driver is disabled. 1 1 4 OE/ST/NC VDD H : specified frequency output 1OE/ ST/NC Standby L: output is low (weak pull down). Device goes to sleep mode. Supply current reduces to I std. 1 Any voltage between 0 and Vdd or Open : Specified frequency No Connect output. Pin 1 has no function. 2 3 OUT GND 2 GND Power Electrical ground 3 OUT Output Oscillator output 2 4 VDD Power Power supply voltage Figure 1. Pin Assignments Notes: 1. In OE or ST mode, a pull-up resistor of 10kohm or less is recommended if pin 1 is not externally driven. If pin 1 needs to be left floating, use the NC option. 2. A capacitor of value 0.1 F or higher between Vdd and GND is required. Rev. 1.01 Page 2 of 13 www.sitime.com