EVALSTGAP2SM STMicroelectronics

EVALSTGAP2SM Demonstration board for STGAP2SM isolated 4 A single gate driver Data brief Description The STGAP2SM is an isolated single gate driver. The gate driver is characterized by 4 A current capability and rail-to-rail outputs, making the device suitable also for high power inverter applications such as motor drivers in industrial applications equipped with MOSFET/IGBT/SiC power switch. Two different variants are available: one with separated source and sink outputs, the other with single output pin and a dedicated pin for Miller clamp function. The EVALSTGAP2S is suitable for both output configuration variants. The device integrates protection functions: UVLO and thermal shutdown are included to simplify the design of high reliability systems. Dual input pins allow choosing the control signal polarity and also Features implementing HW interlocking protection in order to avoid cross-conduction in case of controller High voltage rail up to 1700 V malfunction. Driver current capability: The device allows the implementation of negative 4 A source/sink at 25 C gate driving, and the on-board isolated DC-DC Separate sink and source for simplified gate converters allow working with optimized driving driving configuration (STGAP2SM) voltage for MOSFET/IGBT or SiC. 4 A Miller clamp (STGAP2SCM) The EVALSTGAP2S board allows evaluating all Short propagation delay: 100 ns the STGAP2SM features while driving a half- bridge power stage with voltage rating up to 1700 UVLO function V in TO-220 or TO-247 package. Gate driving voltage up to 26 V The board facilitates the selection and Negative gate driving modification of the values of relevant external On-board isolated DC-DC converters to supply components in order to ease driver s performance gate drivers, fed by VAUX = 5 V evaluation under different applicative conditions VDD logic supply local 3.3 V or VAUX and fine pre-tuning of final application components. 3.3 V, 5 V TTL/CMOS inputs with hysteresis Easy jumper selection of driving voltage configuration: +15/0 V +15/-3 V +19/0 V +19/-3 V Temperature shutdown protection November 2018 DB3768 Rev 1 1/12 For further information contact your local STMicroelectronics sales office. www.st.comContents EVALSTGAP2SM Contents 1 Schematic diagrams . 3 2 Bill of material 6 3 Layout and component placements 8 4 Revision history . 11 2/12 DB3768 Rev 1