L4978 STMicroelectronics

L4978 2A STEP DOWN SWITCHING REGULATOR 1 Features Figure 1. Packages UP TO 2A STEP DOWN CONVERTER OPERATING INPUT VOLTAGE FROM 8V TO 55V PRECISE 3.3V (1%) INTERNAL DIP-8 SO16W REFERENCE VOLTAGE OUTPUT VOLTAGE ADJUSTABLE FROM Table 1. Order Codes 3.3V TO 50V Part Number Package SWITCHING FREQUENCY ADJUSTABLE UP L4978 DIP-8 TO 300KHz VOLTAGE FEEDFORWARD L4978D SO16 ZERO LOAD CURRENT OPERATION L4978D013TR SO16 in Tape & Reel INTERNAL CURRENT LIMITING (PULSE- BYPULSE AND HICCUP MODE) efficency and high switching speed. INHIBIT FOR ZERO CURRENT CONSUMPTION A switching frequency up to 300KHz is achievable (the maximum power dissipation of the packages PROTECTION AGAINST FEEDBACK must be observed). A wide input voltage range be- DISCONNECTION tween 8V to 55V and output voltages regulated THERMAL SHUTDOWN from 3.3V to 50V cover the majority of todays ap- SOFT START FUNCTION plications. Features of this new generations of DC- DC converter include pulse-by-pulse current limit, 2 DESCRIPTION hiccup mode for short circuit protection, voltage The L4978 is a step down monolithic power feedforward regulation, soft-start, protection switching regulator delivering 2A at a voltage be- against feedback loop disconnection, inhibit for tween 3.3V and 50V (selected by a simple external zero current consumption and thermal shutdown. divider). Realized in BCD mixed technology, the The device is available in plastic dual in line, DIP- device uses an internal power D-MOS transistor 8 for standard assembly, and SO16W for SMD as- (with a typical R of 0.25) to obtain very high dson sembly. Figure 2. Typical Application Circuit Vi=8V to 55V 5 8 R 1 20K L4978 3 4 C C C 1 7 2 L1 7 1 6 2 V =3.3V/2A O 220F 220nF 2.7nF 126H 63V (77120) C 6 R D1 2 100nF C 9.1K ST 8 C 5 330F PS3L60U 100nF C 4 22nF D98IN837A Rev. 9 May 2005 1/13L4978 Table 2. Block Diagram VCC 5 THERMAL VOLTAGES SHUTDOWN MONITOR CBOOT CHARGE 2 INTERNAL INTERNAL SS INH INHIBIT SOFTSTART REFERENCE SUPPLY 5.1V 3.3V 7 COMP 6 BOOT 8 E/A FB PWM R Q CBOOT 3.3V S CHARGE AT LIGHT DRIVE LOADS OSCILLATOR 1 3 4 D97IN594 OSC GND OUT Figure 3. Pins Connection (Top view) N.C. 1 16 N.C. GND 2 15 N.C. SS INH 3 14 FB GND 1 8 FB OSC 4 13 COMP SS INH 2 7 COMP OUT 5 12 BOOT OSC 3 6 BOOT OUT 6 11 VCC OUT 4 5 VCC N.C. 7 10 N.C. D97IN595 N.C. 8 9 N.C. D97IN596 DIP-8 SO16W Table 3. Pin Description N Pin Name Function 1 2 GND Ground 2 3 SS INH A logic signal (active low) disables the device (sleep mode operation). A capacitor connected between this pin and ground determines the soft start time. When this pin is grounded disables the device (driven by open collector/drain). 3 4 OSC An external resistor connected between the unregulated input voltage and this pin and a capacitor connected from this pin to ground fix the switching frequency. (Line feed forward is automatically obtained) 2/13