L6718 Digitally controlled dual PWM with embedded drivers for VR12 processors Datasheet - production data Applications High-current VRM / VRD for desktop / server / new generation workstation CPUs DDR3 DDR4 memory supply for VR12 VFQFPN56 -7x7 mm Description The L6718 is a very compact, digitally controlled Features and cost effective dual controller designed to VR12 compliant with 25 MHz SVID bus rev. 1.5 power Intel VR12 processors. Dedicated pinstrapping is used to program the main Second generation LTB Technology parameters. Very compact dual controller: The device features from 2 to 4-phase Up to 4 phases for core section with 2 programmable operation for the core section internal drivers providing 2 embedded drivers. A single-phase 1 phase for GFX section with internal driver with embedded driver and with independent Input voltage up to 12 V control loop is used for GFX. SMBus interface for power management The L6718 supports power state transitions SWAP, Jmode, multi-rail only support featuring VFDE and a programmable DPM, maintaining the best efficiency over all loading Programmable offset voltage conditions without compromising transient Single NTC design for TM, LL and IMON response. thermal compensation (for each section) Second generation LTB Technology allows a VFDE for efficiency optimization minimal cost output filter providing fast load DPM - dynamic phase management transient response. The controller assures fast and independent protection against load Dual differential remote sense overcurrent, under/overvoltage and feedback 0.5% output voltage accuracy disconnections. Full-differential current sense across DCR The device is available in VFQFPN56, 7x7 mm AVP - adaptive voltage positioning compact package with exposed pad. Programmable switching frequency Table 1. Device summary Dual current monitor Order code Package Packaging Pre-biased output management High-current embedded drivers optimized for L6718 VFQFPN56 7x7 mm Tray 7 V operation L6718TR VFQFPN56 7x7 mm Tape and reel OC, OV, UV and FB disconnection protection Dual VR READY VFQFPN56 7x7 mm package with exposed pad April 2013 DocID023399 Rev 3 1/71 This is information on a product in full production. www.st.com 71Contents L6718 Contents 1 Typical application circuit and block diagram 7 1.1 Application circuit 7 1.2 Block diagram 10 2 Pin description and connection diagrams 11 2.1 Pin description . 12 2.2 Thermal data 19 3 Electrical specifications . 20 3.1 Absolute maximum ratings 20 3.2 Electrical characteristics 20 4 VID tables . 24 5 Device description and operation . 26 6 Device configuration 28 6.1 CPU mode 28 6.2 DDR mode 28 6.3 SWAP mode . 29 6.3.1 MRO - multi-phase rail only 29 6.4 Jmode . 30 6.5 Phase number configuration 30 6.6 Pinstrapping configuration 31 6.6.1 CONFIG0 in CPU mode 32 6.6.2 CONFIG0 in DDR mode (STCOMP=GND) 34 6.6.3 CONFIG1 in CPU mode 36 6.6.4 CONFIG1 in DDR mode (STCOMP=GND) 37 6.6.5 CONFIG2 38 6.6.6 CONFIG3 40 7 L6718 power manager . 42 7.1 SMBus power manager 42 2/71 DocID023399 Rev 3