M24C64-DFCT6TPK STMicroelectronics

M24C64-W M24C64-R M24C64-F M24C64-DF 64-Kbit serial IC bus EEPROM Datasheet - production data Features 2 Compatible with all I C bus modes: 1 MHz 400 kHz 100 kHz PDIP8 (BN) Memory array: 64 Kbit (8 Kbyte) of EEPROM Page size: 32 byte Additional Write lockable page (M24C64-D order codes) TSSOP8 (DW) SO8 (MN) Single supply voltage: 169 mil width 150 mil width 1.7 V to 5.5 V over 40 C / +85 C 1.6 V to 5.5 V over 0 C / +85 C Write: Byte Write within 5 ms Page Write within 5 ms UFDFPN5 (MH) UFDFPN8 (MC) Random and sequential Read modes DFN8 - 2x3 mm DFN5 -1.7x1.4 mm Write protect of the whole memory array Enhanced ESD/Latch-Up protection More than 4 million Write cycles More than 200-years data retention WLCSP (CS) Thin WLCSP (CT) Packages PDIP8 ECOPACK2 SO8 ECOPACK2 TSSOP8 ECOPACK2 UFDFPN ECOPACK2 WLCSP WLCSP ECOPACK2 Unsawn wafer (CU) Unsawn wafer (each die is tested) March 2018 DS6638 Rev 36 1/54 This is information on a product in full production. www.st.comContents M24C64-W M24C64-R M24C64-F M24C64-DF Contents 1 Description . 6 2 Signal description . 9 2.1 Serial Clock (SCL) . 9 2.2 Serial Data (SDA) 9 2.3 Chip Enable (E2, E1, E0) 9 2.4 Write Control (WC) . 9 2.5 V (ground) 10 SS 2.6 Supply voltage (V ) 10 CC 2.6.1 Operating supply voltage (V ) . 10 CC 2.6.2 Power-up conditions . 10 2.6.3 Device reset 10 2.6.4 Power-down conditions . 10 3 Memory organization . 11 4 Device operation . 12 4.1 Start condition 13 4.2 Stop condition 13 4.3 Data input . 13 4.4 Acknowledge bit (ACK) 13 4.5 Device addressing 14 5 Instructions . 15 5.1 Write operations 15 5.1.1 Byte Write . 16 5.1.2 Page Write . 17 5.1.3 Write Identification Page (M24C64-D only) 18 5.1.4 Lock Identification Page (M24C64-D only) 18 5.1.5 ECC (Error Correction Code) and Write cycling 18 5.1.6 Minimizing Write delays by polling on ACK 19 5.2 Read operations 20 5.2.1 Random Address Read . 21 2/54 DS6638 Rev 36