STEVAL-CCH002V1 STMicroelectronics

STDVE003A Adaptive 3.4 Gbps 3:1 TMDS/HDMI signal equalizer Features Compatible with the high-definition multimedia interface (HDMI) v1.3 digital interface Conforms to the transition minimized differential signaling (TMDS) voltage standard on input and output channels 340 MHz maximum clock speed operation TQFP80 supports all video formats with deep color at maximum refresh rates 3.4 Gbps data rate per channel Fully automatic adaptive equalizer Description Single supply V : 3.135 to 3.465 V CC The STDVE003A integrates a 4-channel 3.4 Gbps ESD: > 5 KV HBM for all TMDS I/Os TMDS equalizer and a 3:1 switch to select one of 2 Integrated open-drain I C buffer for display the three HDMI ports. The 3-input HDMI ports can data channel (DDC) be either external ports or internal sources. High- 5.3 V tolerant DDC and HPD I/Os speed data paths and flow-through pinout 2 minimize the internal device jitter and simplify the Lock-up free operation of I C bus board layout. The equalizer overcomes the 2 0 to 400 kHz clock frequency for I C bus intersymbol interference (ISI) jitter effects from Low capacitance of all the channels lossy cables. The buffer/driver on the output can drive the TMDS output signals over long Equalizer regenerates the incoming attenu- distances. In addition to this, STDVE003A ated TMDS signal integrates the 50 termination resistor on all the Buffer drives the TMDS outputs over long PCB input channels to improve performance and track lengths reduce board space. The device can be placed in Low output skew and jitter a low-power mode by disabling the output current drivers. The STDVE003A is ideal for advanced TV Tight input thresholds reduce bit error rates and STB applications supporting HDMI/DVI On-chip selectable 50 input termination standard. The differential signal from the Low ground bounce HDMI/DVI ports can be routed through the STDVE003A to guarantee good signal quality at Data and control inputs provide undershoot the HDMI receiver. Designed for very low skew, clamp diode jitter and low I/O capacitance, the switch -40C to 85C operating temperature range preserves the signal integrity to pass the stringent Evaluation kit is available HDMI compliance requirements. Table 1. Device summary Order code Operating temperature Package Packaging STDEV003ABTR -40C to 85C TQFP80 Tape and reel December 2008 Rev 4 1/42 www.st.com 42 Obsolete Product(s) - Obsolete Product(s)Contents STDVE003A Contents 1 Block diagram 5 1.1 Application diagrams . 6 2 Pin configuration 7 3 Functional description 10 3.1 Adaptive equalizer 10 3.2 Operating modes . 12 3.2.1 SEL operating modes 13 3.3 HPD pins . 13 3.4 DDC channels . 13 3.5 I2C DDC line repeater . 14 3.6 Power-down condition . 14 3.7 Bias . 14 3.8 Timing between HPD and DDC 15 4 Maximum rating 16 4.1 Recommended operating conditions 17 4.2 DC electrical characteristics . 17 4.3 DC electrical characteristics (I2C repeater) . 22 4.4 Dynamic switching characteristics 23 4.5 Dynamic switching characteristics (I2C repeater) 26 5 Application information . 36 5.1 Power supply sequencing . 36 5.2 Power supply requirements . 36 5.3 Differential traces . 36 5.3.1 I2C lines application information 37 6 Package mechanical data 38 7 Revision history . 41 2/42 Obsolete Product(s) - Obsolete Product(s)