STEVAL-ISA051V2 STMicroelectronics

STEVAL-ISA051V2 Complete DDR2/3 memory power supply controller evaluation board based on the PM6670AS Data Brief Features 4.5 V to 36 V input voltage range 0.9 V, 1% voltage reference 1.8 V (DDR2) or 1.5 V (DDR3) fixed output voltages 0.9 V to 2.6 V adjustable output voltage 1.237 V 1% reference voltage available Very fast load transient response using constant on-time loop control No R current sensing using the R SENSE DS(on) of the low-side MOSFETs STEVAL-ISA051V2 Negative current limit Latched OVP, UVP and thermal shutdown The device is fully compliant with system sleep Fixed 3 ms soft-start states S3 and S4/S5, providing LDO output high Selectable pulse-skipping at light load impedance in suspend-to-RAM and tracking discharge of all outputs in suspend-to-disk. Selectable no-audible (33 kHz) pulse-skip mode All ceramic output capacitors application supported Output voltage ripple compensation Description This evaluation board based on the PM6670AS device is a complete DDR2/3 power supply regulator for portable applications designed to meet JEDEC specifications. It integrates a constant on-time (COT) buck controller, a 2 Apk sink/source low dropout regulator and a 15 mA low noise buffered reference. The COT architecture assures fast transient response supporting both polymeric and ceramic output capacitors. An embedded integrator control loop compensates the DC voltage error due to the output ripple. The 2 Apk sink/source linear regulator provides the memory termination voltage with fast load transient response. March 2008 Rev 1 1/4 For further information contact your local STMicroelectronics sales office. www.st.com 4 Obsolete Product(s) - Obsolete Product(s)Circuit schematic STEVAL-ISA051V2 1 Circuit schematic Figure 1. Schematic 2/4 Obsolete Product(s) - Obsolete Product(s) J1 VCC J5 VCC 1 2 1 VCC 1 C11 R1 33330k 10u VIN R2 C14 C5 R7 D1 1188k 10000n C1 C2 1u 3R9 BABAT41J 10u 10u J9 VCCCCGND 1 Q1 STS5NF6060L R10 R6 J6 0 0 0 0 0 0 C12 0 0 LDOIN 1 100n R4 3R3 1 2 4 J7 VTT 1 1 2 L1 1u J2 C6 C7 C19 C20 R3 1k5 1 2 1 1010u 1010u 10u 10u U1 1 2 C13 VCC 10000n C3 C4 VDDDDQ 25 THPPDD R14 7.5k R15 6.8k D3 0 0 0 1 18 R17 0 VTTGND VCC 2 17 4 22200u 22200u VTTSNS LGATE 3 16 D2 DDRDDRSSELEL PGND 4 15 Q2 R16 VTTREFEF PGPG 5 PM666670ASAS 14 4R7 SGND S3 6 13 STS7NF60L 1 2 AVCC S5 J8 VCC VTTTTREFEF 1 C10 R11 10100k C18 C15 47n 1 2 1n 10100n C21 R12 10100k C8 2 1 DSCG 110000p 1 2 33n JP1 C9 JP2P2 C22 100p SW1 TP1 R9 JP3 GNDND TP 0 1188k R13 0 10100k J3 DDDRRSEL 1 J10 MODE AGND 1 R8 2727k PGND 0 J4 J11 1 0 0 AGND 1 JP5 0 1 2 PGPG C16 68080p INT CER C17 0 0 0 2 1 2 1 2 1 1 2 3 4 5 6 2 1 2 1 2 1 2 1 2 1 2 1 7 24 VREFEF VTT 8 23 VOSCSC LDOIN 9 22 VSVSNS BOOT 10 21 MODE HGATE 11 20 COMP PHASEASE 12 19 DSCG CSNS 2 1 1 2 1 2 3 4 5 6 1 2 1 2 1 4 2 3 2 1 2 1 2 1 2 1 1 5 1 5 2 6 2 6 3 7 3 7 8 8 2 1 STPPSS11LL60A 2 1 2 1 2 1 2 1 2 1 2 1 STPSPS1L1L60A