STIPN1M50T-H Datasheet SLLIMM-nano IPM, 3-phase inverter, 1 A, 3.6 max., 500 V MOSFET Features IPM 1 A, 500 V, R = 3.6 , 3-phase MOSFET inverter bridge including DS(on) control ICs for gate driving Optimized for low electromagnetic interference 3.3 V, 5 V, 15 V CMOS/TTL input comparators with hysteresis and pull-down/ pull-up resistors Undervoltage lockout Internal bootstrap diode Interlocking function Shutdown function Comparator for fault protection against overtemperature and overcurrent Op-amp for advanced current sensing Optimized pinout for easy board layout NTC for temperature control (UL 1434 CA 2 and 4) NDIP-26L Up to 2 kV ESD protection (HBM C = 100 pF, R = 1.5 k) Applications 3-phase inverters for motor drives Dishwashers Roller shutters Air-conditioning fans Draining and recirculation pumps Description This SLLIMM (small low-loss intelligent molded module) nano provides a compact, high-performance AC motor drive in a simple, rugged design. It is composed of six Product status link MOSFETs and three half-bridge HVICs for gate driving, providing low STIPN1M50T-H electromagnetic interference (EMI) characteristics with optimized switching speed. The package is optimized for thermal performance and compactness in built-in motor applications, or other low power applications where assembly space is limited. This Product summary IPM includes an operational amplifier, completely uncommitted, and a comparator Order code STIPN1M50T-H that can be used to design a fast and efficient protection circuit. SLLIMM is a trademark of STMicroelectronics. Marking IPN1M50T-H Package NDIP-26L Packing Tube DS11494 - Rev 6 - January 2020 www.st.com For further information contact your local STMicroelectronics sales office.STIPN1M50T-H Internal schematic diagram and pin configuration 1 Internal schematic diagram and pin configuration Figure 1. Internal schematic diagram GND(1 ) (26)N W NTC T/SD/OD (2) GND (25)W,OUT W VccW(3 ) HVG OUT (24)Vboot W VCC HinW(4 ) HIN LVG SD/OD LinW(5 ) LIN Vboot OP+(6 ) (23)N V OPOUT(7 ) GND OP+ OPOUT OP- HVG (22)V,OUT V OP-(8 ) OUT VCC VccV(9 ) HIN LVG SD/OD LIN Vboot HinV(10) (21)Vboot V LinV(11 ) (20)N U GND Cin(12) CIN HVG VccU(13 ) (19)U,OUT U OUT VCC HIN LVG HinU(14) SD/OD LIN Vboot (18) P T/SD/OD(15) LinU(16 ) (17)Vboot U GIPD120120170806SA DS11494 - Rev 6 page 2/23