STM32MP153A/D Arm dual Cortex -A7 800 MHz + Cortex -M4 MPU, TFT, 37 comm. interfaces, 29 timers, adv. analog Datasheet - production data Features TFBGA LFBGA Includes ST state-of-the-art patented LFBGA448 (18 18mm) TFBGA361 (12 12 mm) technology LFBGA354 (16 16mm) TFBGA257 (10 10 mm) min Pitch 0.5mm Pitch 0.8mm Core Low-power modes: Sleep, Stop and Standby 32-bit dual-core Arm Cortex -A7 DDR memory retention in Standby mode L1 32-Kbyte I / 32-Kbyte D for each core Controls for PMIC companion chip 256-Kbyte unified level 2 cache Arm NEON and Arm TrustZone Low-power consumption 32-bit Arm Cortex -M4 with FPU/MPU Total current consumption down to 2 A Up to 209 MHz (Up to 703 CoreMark ) (Standby mode, no RTC, no LSE, no BKPSRAM, no RETRAM) Memories External DDR memory up to 1 Gbyte Clock management up to LPDDR2/LPDDR3-1066 16/32-bit Internal oscillators: 64 MHz HSI oscillator, up to DDR3/DDR3L-1066 16/32-bit 4 MHz CSI oscillator, 32 kHz LSI oscillator 708 Kbytes of internal SRAM: 256 Kbytes of External oscillators: 8-48 MHz HSE oscillator, AXI SYSRAM + 384 Kbytes of AHB SRAM + 32.768 kHz LSE oscillator 64 Kbytes of AHB SRAM in Backup domain 5 PLLs with fractional mode and 4 Kbytes of SRAM in Backup domain Dual mode Quad-SPI memory interface General-purpose input/outputs Flexible external memory controller with up to Up to 176 I/O ports with interrupt capability 16-bit data bus: parallel interface to connect Up to 8 secure I/Os external ICs and SLC NAND memories with up Up to 6 Wakeup, 3 tampers, 1 active to 8-bit ECC tamper Security/safety Interconnect matrix TrustZone peripherals, active tamper 2 bus matrices Cortex -M4 resources isolation 64-bit Arm AMBA AXI interconnect, up to 266 MHz Reset and power management 32-bit Arm AMBA AHB interconnect, up 1.71 V to 3.6 V I/Os supply (5 V-tolerant I/Os) to 209 MHz POR, PDR, PVD and BOR 3 DMA controllers to unload the CPU On-chip LDOs (RETRAM, BKPSRAM, USB 48 physical channels in total 1.8 V, 1.1 V) 1 high-speed general-purpose master direct Backup regulator (~0.9 V) memory access controller (MDMA) Internal temperature sensors May 2021 DS12502 Rev 6 1/256 This is information on a product in full production. www.st.comSTM32MP153A/D 2 dual-port DMAs with FIFO and request Up to 29 timers and 3 watchdogs router capabilities for optimal peripheral 2 32-bit timers with up to 4 IC/OC/PWM or management pulse counter and quadrature (incremental) encoder input Up to 37 communication peripherals 2 16-bit advanced motor control timers 2 6 I C FM+ (1 Mbit/s, SMBus/PMBus) 10 16-bit general-purpose timers (including 2 4 UART + 4 USART (12.5 Mbit/s, ISO7816 basic timers without PWM) interface, LIN, IrDA, SPI slave) 5 16-bit low-power timers 6 SPI (50 Mbit/s, including 3 with full duplex 2 RTC with sub-second accuracy and hardware I S audio class accuracy via internal audio PLL calendar or external clock) 2 2 4 Cortex -A7 system timers (secure, non- 4 SAI (stereo audio: I S, PDM, SPDIF Tx) secure, virtual, hypervisor) SPDIF Rx with 4 inputs 1 SysTick M4 timer HDMI-CEC interface 3 watchdogs (2 independent and window) MDIO Slave interface 3 SDMMC up to 8-bit (SD / eMMC / SDIO) Hardware acceleration 2 CAN controllers supporting CAN FD HASH (MD5, SHA-1, SHA224, SHA256), protocol, out of which one supports time- HMAC triggered CAN (TTCAN) 2 true random number generator 2 USB 2.0 high-speed Host (3 oscillators each) + 1 USB 2.0 full-speed OTG simultaneously 2 CRC calculation unit or 1 USB 2.0 high-speed Host + 1 USB 2.0 high-speed OTG Debug mode simultaneously Arm CoreSight trace and debug: SWD and 10/100M or Gigabit Ethernet GMAC JTAG interfaces IEEE 1588v2 hardware, 8-Kbyte embedded trace buffer MII/RMII/GMII/RGMII 8- to 14-bit camera interface up to 140 Mbyte/s 3072-bit fuses including 96-bit unique ID, up to 1184-bit available for user 6 analog peripherals All packages are ECOPACK2 compliant 2 ADCs with 16-bit max. resolution (12 bits up to 4.5 Msps, 14 bits up to 4 Msps, 16 bits up to 3.6 Msps) 1 temperature sensor 2 12-bit D/A converters (1 MHz) 1 digital filters for sigma delta modulator (DFSDM) with 8 channels/6 filters Internal or external ADC/DAC reference V REF+ Graphics LCD-TFT controller, up to 24-bit // RGB888 up to WXGA (1366 768) 60 fps or up to Full HD (1920 1080) 30 fps Pixel clock up to 90 MHz Two layers with programmable colour LUT 2/256 DS12502 Rev 6