DESCRIPTION Development Board The EPC9047 development boards are in a half bridge topology with onboard gate drives, featuring EPC9047 the EPC2033 eGaN field effect transistors (FETs). The purpose of these development boards is to simplify the evaluation process of these eGaN FETs by including all the critical components on a Quick Start Guide single board that can be easily connected into any existing converter. The development board is 2 x 1.5 and contains two eGaN FETs in a half bridge configuration using Half Bridge with Gate Drive the Texas Instruments UCC27611 gate driver, supply and bypass capacitors. The board contains all for EPC2033 critical components and layout for optimal switching performance. There are also various probe points to facilitate simple waveform measurement and efficiency calculation. A complete block diagram of the circuit is given in Figure 1. For more information on the EPC2033 eGaN FET please refer to the data sheet available from EPC at www.epc-co.com. The data sheet should be read in conjunction with this quick start guide. Table 1: Performance Summary (T = 25C) A SYMBOL PARAMETER CONDITIONS MIN MAX UNITS V Gate Drive Input Supply Range 7 12 V DD V Bus Input Voltage Range 110 V IN V Switch Node Output Voltage 150 V OUT I Switch Node Output Current 12* A OUT V PWM Logic Input Voltage Input High 3.5 6 V PWM Threshold Input Low 0 1.5 V Minimum High State Input Pulse V rise and fall time < 10ns 100 ns PWM Width Minimum Low State Input Pulse V rise and fall time < 10ns 500 ns PWM Width *Assumes inductive load, maximum current depends on die temperature actual maximum current will be subject to switching frequency, bus voltage and thermal management. Dependent on time needed to refresh high side bootstrap supply voltage. For More Information: Please contact info epc-co.com or your local sales representative Visit our website: www.epc-co.com Sign-up to receive EPC updates at bit.ly/EPCupdates or text EPC to 22828 EPC Products are distributed through Digi-Key. www.digikey.com Demonstration Board Notification EPC9047 boards are intended for product evaluation purposes only and are not intended for commercial use. As evaluation tools, they are not designed for compliance with the European Union directive on electromagnetic compatibility or any other such directives or regulations. As board builds are at times subject to product availability, it is possible that boards may contain components or assembly materials that are not RoHS compliant. Efficient Power Conversion Corporation (EPC) makes no guarantee that the purchased board is 100% RoHS compliant. No Licenses are implied or granted under any patent right or other intellectual property whatsoever. EPC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. EPC reserves the right at any time, without notice, to change said circuitry and specifications. EPC EFFICIENT POWER CONVERSION CORPORATION WWW.EPC-CO.COM COPYRIGHT 2015QUICK START GUIDE EPC9047 QUICK START PROCEDURE The development boards are easy to set up to evaluate the performance 6. Turn on the bus voltage to the required value (do not exceed the of the eGaN FET. Refer to Figure 2 for proper connect and measurement absolute maximum voltage of 150 V on V . OUT setup and follow the procedure below: 7. Turn on the controller / PWM input source and probe switching node 1. With power off, connect the input power supply bus to +V (J5, J6) to see switching operation. IN and ground / return to V (J7, J8). IN 8. Once operational, adjust the bus voltage and load PWM control 2. With power off, connect the switch node of the half bridge OUT within the operating range and observe the output switching (J3, J4) to your circuit as required. behavior, efficiency and other parameters. 3. With power off, connect the gate drive input to +V (J1, Pin-1) and 9. For shutdown, please follow steps in reverse. DD ground return to V (J1, Pin-2). DD NOTE. When measuring the high frequency content switch node (OUT), care must 4. With power off, connect the input PWM control signal to PWM be taken to avoid long ground leads. Measure the switch node (OUT) by placing the oscilloscope probe tip through the large via on the switch node (designed for this (J2, Pin-1) and ground return to any of the remaining J2 pins. purpose) and grounding the probe directly across the GND terminals provided. See 5. Turn on the gate drive supply make sure the supply is between Figure 3 for proper scope probe technique. 7 V and 12 V range. Half Bridge Gate Drive Supply with Bypass V DD Gate Drive Regulator V IN Level shift, Enable OUT Dead-time PWM Input Adjust and Gate Drive Figure 1: Block Diagram of Development Board EPC EFFICIENT POWER CONVERSION CORPORATION WWW.EPC-CO.COM COPYRIGHT 2015 PAGE 2