Balanced Line Receiver ICs THAT 1240, 1243, 1246 FEATURES APPLICATIONS High CMRR: typ. 90 dB at 60Hz Balanced Audio Line Receivers Excellent audio performance Wide bandwidth: typ. >8.6 MHz Instrumentation Amplifiers High slew rate: typ. 12 V/ s Low distortion: typ. 0.0006% THD Differential Amplifiers Low noise: typ. -104 dBu Low current: typ. 2 mA Precision Summers Several gains: 0 dB, 3 dB, 6 dB Industry Standard Pinout Current Shunt Monitors Description The THAT 1240-series of precision differen- simplicity, reliability, matching, and small size of tial amplifiers was designed primarily for use as a fully integrated solution. balanced line receivers for audio applications. All three versions of the part typically exhibit Gains of 0 dB, 3 dB, and 6 dB are available to 90 dB of common-mode rejection. With 12 V/ s suit various applications requirements. slew rate, >8.6 MHz bandwidth, and 0.0006 % THD, these devices are sonically trans- These devices are laser trimmed in wafer parent. Moreover, current consumption is form to obtain the precision resistor matching typically a low 2 mA. Both surface-mount and needed for high CMR performance and precise DIP packages are available. gain. Manufactured in THAT Corporations The THAT 1246 is pin-compatible with the proprietary complementary dielectric isolation TI INA137 and Analog Devices SSM2143, while (DI) process, the THAT 1240-series provides the the THAT 1240 is pin-compatible with the sonic benefits of discrete designs with the INA134 and the SSM2141. Pin Name DIP Pin SO Pin Vcc Ref 1 1 In- 2 2 In- Sense In+ 3 3 R R 1 2 Vee 4 4 Sense 5 5 Vout Vout 6 6 R R Vcc 7 7 3 4 In+ Ref NC 8 8 Table 1. 1240-series pin assignments Vee NC Part no. Gain R , R R , R Gain Plastic DIP Plastic SO 1 3 2 4 THAT1240 0 dB 0 dB 1240P08-U 1240S08-U THAT1243 -3 dB 3 dB 1243P08-U 1243S08-U THAT1246 -6 dB 6 dB 1246P08-U 1246S08-U Table 2. Ordering information Figure 1. THAT 1240-series equivalent circuit diagram THAT Corporation 45 Sumner Street Milford, MA 01757-1656 USA Tel: +1 508 478 9200 Fax: +1 508 478 0990 Web: www.thatcorp.com Copyright 2008, THAT Corporation Document 600035 Rev 04Document 600035 Rev 04 Page 2 of 8 THAT 1240 Series Balanced Line Receiver ICs 1 SPECIFICATIONS 2,3 Absolute Maximum Ratings Supply Voltages (V - V)40V Storage Temperature Range (T ) -40 to +125 C CC EE ST Maximum In or In Voltage -50V + V , 50V + V Operating Temperature Range (T ) 0 to +85 C - + CC EE OP Max/Min Ref or Sense Voltage VCC + 0.5V, VEE - 0.5V Output Short-Circuit Duration (tSH) Continuous Maximum Output Voltage (V)V + 0.5V, V - 0.5V Junction Temperature (T ) +125 C OM CC EE J 2,4 Electrical Characteristics Parameter Symbol Conditions Min Typ Max Units Supply Current ICC No signal 2.0 2.8 mA Supply Voltage V -V 6 36 V CC EE Input Voltage Range V Differential (equal and opposite swing) IN-DIFF 1240 (0dB gain) 21.5 dBu 1243 (-3dB gain) 24.4 dBu 1246 (-6dB gain) 27.5 dBu V Common Mode IN-CM 1240 (0dB gain) 27.5 dBu 1243 (-3dB gain) 29.1 dBu 1246 (-6dB gain) 31 dBu 5 Input Impedance ZIN-DIFF Differential 1240 (0dB gain) 18 k 1243 (-3dB gain) 21 k 1246 (-6dB gain) 24 k ZIN-CM Common Mode All versions 18 k Common Mode Rejection Ratio CMRR Matched source impedances V = 10V CM DC 70 90 dB 60Hz 70 90 dB 20kHz 85 dB 6 Power Supply Rejection Ratio PSRR 3V to 18V VCC = -VEE all gains 90 dB Total Harmonic Distortion THD V = 10dBV, f = 1kHz, BW = 22kHz, R = 2 k IN DIFF L 0.0006 % Output Noise eOUT 22 Hz to 22kHz bandwidth 1240 (0dB gain) -104 dBu 1243 (-3dB gain) -105 dBu 1246 (-6dB gain) -106 dBu Slew Rate SR R = 2k C = 300 pF, all gains 7 12 V/s L L 1. All specifications are subject to change without notice. 2. Unless otherwise noted, T =25C, V =+15V, V = -15V. A CC EE 3. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only the functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not impli ed. Exposure to absolute maximum rating condi- tions for extended periods may affect device reliability. 4. 0 dBu = 0.775 Vrms. 5. While specific resistor ratios are very closely trimmed, absolute resistance values can vary 25% from the typical values show n. Input impedance is monitored by lot sampling. 6. Defined with respect to differential gain. 7. Parameter guaranteed over the entire range of power supply and temperature. THAT Corporation 45 Sumner Street Milford, MA 01757-1656 USA Tel: +1 508 478 9200 Fax: +1 508 478 0990 Web: www.thatcorp.com Copyright 2008, THAT Corporation