74LCX74FT(AJ) Toshiba

74LCX74FT CMOS Digital Integrated Circuits Silicon Monolithic 74LCX74FT74LCX74FT74LCX74FT74LCX74FT 1. 1. Functional DescriptionFunctional Description 1. 1. Functional DescriptionFunctional Description Low-Voltage Dual D-Type Flip-Flop with 5-V Tolerant Inputs and Outputs 2. 2. 2. 2. GeneralGeneralGeneralGeneral The 74LCX74FT is a high-performance CMOS D-type flip-flop. Designed for use in 3.3 V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. The device is designed for low-voltage (3.3 V) V applications, but it could be used to interface to 5 V supply CC environment for inputs. The signal level applied to the D input is transferred to Q output during the positive going transition of the CK pulse. CLR and PR are independent of the CK and are accomplished by setting the appropriate input low. All inputs are equipped with protection circuits against static discharge. 3. 3. FeaturesFeatures 3. 3. FeaturesFeatures (1) AEC-Q100 (Rev. H) (Note 1) (2) Wide operating temperature range: T = -40 to 125 opr (3) Low-voltage operation: V = 1.65 to 3.6 V CC (4) High-speed operation: t = 8.0 ns (max) (V = 3.3 0.3 V) pd CC (5) Output current: I /I = 24 mA (min) (V = 3.0 V) OH OL CC (6) Power-down protection provided on all inputs and outputs (7) Pin and function compatible with the 74 series (74LVC/ALVC/ etc.) 74 type Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales representative. 4. 4. 4. 4. PackagingPackagingPackagingPackaging TSSOP14B Start of commercial production 2014-06 2016 Toshiba Corporation 2016-09-15 1 Rev.2.074LCX74FT 5. 5. 5. 5. Pin AssignmentPin AssignmentPin AssignmentPin Assignment 6. 6. MarkingMarking 6. 6. MarkingMarking 7. 7. 7. 7. IEC Logic SymbolIEC Logic SymbolIEC Logic SymbolIEC Logic Symbol 8. 8. 8. 8. Truth TableTruth TableTruth TableTruth Table X: Don t care 2016 Toshiba Corporation 2016-09-15 2 Rev.2.0