DF2B12M4SL ESD Protection Diodes Silicon Epitaxial Planar DF2B12M4SLDF2B12M4SLDF2B12M4SLDF2B12M4SL 1. 1. GeneralGeneral 1. 1. GeneralGeneral The DF2B12M4SL is a TVS diode (ESD protection diode) protects semiconductor devices used in mobile device interfaces and other applications to protect against static electricity and noise. Utilizing snapback characteristics, the DF2B12M4SL provides low dynamic resistance and superior protective performance. Furthermore, it is optimum the high speed signal application for the low capacitance performance. The DF2B12M4SL is housed in an ultra-compact package (0.62 mm 0.32 mm) to meet applications that require a small footprint. 2. 2. 2. 2. ApplicationsApplicationsApplicationsApplications Mobile Equipment Smartphones Tablets Notebook PCs Desktop PCs Note: This product is designed for protection against electrostatic discharge (ESD) and is not intended for any other purpose, including, but not limited to, voltage regulation. 3. 3. FeaturesFeatures 3. 3. FeaturesFeatures (1) Suitable for use with a 10 V signal line. (V 11 V) RWM (2) Protects devices with its high ESD performance. (V = 15 kV (Contact / Air) IEC61000-4-2) ESD (3) Low dynamic resistance protects semiconductor devices from static electricity and noise. (R = 0.65 (typ.)) DYN (4) Snapback characteristics realizing low clamping voltage protects semiconductor devices. (V = 17 V I = 1 A (typ.)) C PP (5) Compact package is suitable for use in high density board layouts such as in mobile devices. (0.62 mm 0.32 mm size (Nickname: SL2)) 4. 4. 4. 4. PackagingPackagingPackagingPackaging SL2 Start of commercial production 2018-01 2018 2018-03-28 1 Toshiba Electronic Devices & Storage Corporation Rev.2.0DF2B12M4SL 5. 5. 5. 5. Example of Circuit DiagramExample of Circuit DiagramExample of Circuit DiagramExample of Circuit Diagram 6. 6. 6. 6. Quick Reference DataQuick Reference DataQuick Reference DataQuick Reference Data Characteristics Symbol Note Test Condition Min Typ. Max Unit Working peak reverse voltage V (Note 1) 11 V RWM Total capacitance C V = 0 V, f = 1 MHz 0.2 0.4 pF t R Dynamic resistance R (Note 2) 0.65 DYN Electrostatic discharge voltage V (Note 3) 15 kV ESD (IEC61000-4-2) (Contact) Note 1: Recommended operating condition. Note 2: TLP parameters: Z0 = 50 , tp = 100 ns, tr = 300 ps, averaging window: t1 = 30 ns to t2 = 60 ns, extraction of dynamic resistance using least squares fit of TLP characteristics between I = 8 A and I = 16 A. PP1 PP2 Note 3: Criterion: No damage to devices. 6.1. 6.1. 6.1. 6.1. TLP Characteristics (Note)TLP Characteristics (Note)TLP Characteristics (Note)TLP Characteristics (Note) Note: The above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. 2018 2018-03-28 2 Toshiba Electronic Devices & Storage Corporation Rev.2.0