TC74AC00P/F/FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74AC00P, TC74AC00F, TC74AC00FT Quad 2-Input NAND Gate The TC74AC00 is an advanced high speed CMOS 2-INPUT TC74AC00P NAND GATE fabricated with silicon gate and double-layer metal 2 wiring C MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge or transient excess voltage. TC74AC00F Features High speed: t = 3.8 ns (typ.) at V = 5 V pd CC Low power dissipation: I = 4 A (max) at Ta = 25C CC High noise immunity: V = V = 28% V (min) NIH NIL CC Symmetrical output impedance: I = I = 24 mA (min) OH OL Capability of driving 50 transmission lines. Balanced propagation delays: t t pLH pHL TC74AC00FT Wide operating voltage range: V (opr) = 2 V to 5.5 V CC Pin and function compatible with 74F00 Weight DIP14-P-300-2.54 : 0.96 g (typ.) SOP14-P-300-1.27A : 0.18 g (typ.) TSSOP14-P-0044-0.65A : 0.06 g (typ.) Start of commercial production 1986-05 1 2014-03-01 TC74AC00P/F/FT Pin Assignment IEC Logic Symbol (1) 1A & (3) 1Y 1A 1 14 V (2) CC 1B (4) 2A (6) 1B 2 13 4B 2Y (5) 2B (9) 1Y 12 4A 3A 3 (8) 3Y (10) 3B 2A 4 11 4Y (12) 4A (11) 4Y (13) 4B 2B 5 10 3B 2Y 6 9 3A GND 7 8 3Y (top view) Truth Table A B Y L L H L H H H L H H H L Absolute Maximum Ratings (Note 1) Characteristics Symbol Rating Unit Supply voltage range V 0.5 to 7.0 V CC DC input voltage V 0.5 to V + 0.5 V IN CC DC output voltage V 0.5 to V + 0.5 V OUT CC Input diode current I 20 mA IK Output diode current I 50 mA OK DC output current I 50 mA OUT DC V /ground current I 100 mA CC CC Power dissipation P 500 (DIP) (Note 2)/180 (SOP/TSSOP) mW D Storage temperature T 65 to 150 C stg Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (Handling Precautions/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 2: 500 mW in the range of Ta = 40C to 65C. From Ta = 65C to 85C a derating factor of 10 mW/C should be applied up to 300 mW. 2 2014-03-01