TC74AC05P/F TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74AC05P, TC74AC05F Hex Inverter (open drain) The TC74AC05 is an advanced high speed CMOS INVERTER TC74AC05P fabricated with silicon gate and double-layer metal wiring 2 C MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. Pin configuration and function are the same as the TC74AC04, but the TC74AC05 has high performance MOS N-channel transistor (open-drain) outputs. This device can, therefore, with a suitable pull-up resistor, be used in wired-OR, LED drive and other applications. TC74AC05F All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features High speed: t = 3.4 ns (typ.) at V = 5 V pz CC Low power dissipation: I = 4 A (max) at Ta = 25C CC High noise immunity: V = V = 28% V (min) NIH NIL CC Symmetrical output impedance: I = 24 mA (min) OL Weight Capability of driving 50 DIP14-P-300-2.54 : 0.96 g (typ.) transmission lines. SOP14-P-300-1.27A : 0.18 g (typ.) Wide operating voltage range: V (opr) = 2 to 5.5 V CC Open drain structure. Pin and function compatible with 74F05 Pin Assignment Start of commercial production 1989-11 1 2014-03-01 TC74AC05P/F IEC Logic Symbol Truth Table A Y L Z H L Z: High impedance System Diagram (per gate) Absolute Maximum Ratings (Note 1) Characteristics Symbol Rating Unit Supply voltage range V 0.5 to 7.0 V CC DC input voltage V 0.5 to V + 0.5 V IN CC DC output voltage V 0.5 to V + 0.5 V OUT CC Input diode current I 20 mA IK Output diode current I 50 mA OK DC output current I +50 mA OUT DC V /ground current I 150 mA CC CC Power dissipation P 500 (DIP) (Note 2)/180 (SOP) mW D Storage temperature T 65 to 150 C stg Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (Handling Precautions/Derating Concept and Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 2: 500 mW in the range of Ta = 40 to 65C. From Ta = 65 to 85C a derating factor of 10 mW/C should be applied up to 300 mW. 2 2014-03-01