DDR3 SO-DIMM DDR3 SO-DIMM is high-speed, low power memory module that use DDR3 SDRAM in FBGA package and a 2048 bits serial EEPROM on a 204-pin printed circuit board. DDR3 SO-DIMM is a Dual In-Line Memory Module and is intended for mounting into 204-pin edge connector sockets. Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges of DQS. Range of operation frequencies, programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications. Features Pin Identification RoHS compliant products. Symbol Function JEDEC standard 1.5V 0.075V Power supply A0~A15, BA0~BA2 Address/Bank input VDDQ=1.5V 0.075V DQ0~DQ63 Data Input / Output. Clock Freq: 400MHZ for 800Mb/s/Pin DQS0~DQS7 Data strobes 533MHZ for 1066Mb/s/Pin /DQS0~/DQS7 Differential Data strobes 667MHZ for 1333Mb/s/Pin. CK0, /CK0,CK1, /CK1 Clock Input. (Differential pair) 800MHZ for 1600Mb/s/Pin CKE0, CKE1 Clock Enable Input. Programmable CAS Latency: 5, 6, 7, 8, 9 ,10 ,11 ODT0, ODT1 On-die termination control line Programmable Additive Latency (Posted /CAS): 0,CL-2 or CL-1 clock /CS0, /CS1 DIMM Rank Select Lines. Programmable /CAS Write Latency (CWL) /RAS Row Address Strobe = 5 (DDR3-800), 6 (DDR3-1066), 7 (DDR3-1333) , /CAS Column Address Strobe 8(DDR3-1600) /WE Write Enable 8 bit pre-fetch DM0~DM7 Data masks/high data strobes Burst Length: 4, 8 VDD Voltage power supply Internal calibration through ZQ pin On Die Termination with ODT pin V DQ/ V CA Power Supply for Reference REF REF Serial presence detect with EEPROM VDDSPD SPD EEPROM Power Supply Asynchronous reset I2C serial bus address select for SA0~SA2 EEPROM SCL I2C serial bus clock for EEPROM SDA I2C serial bus data for EEPROM VSS Ground /RESET Set DRAMs Known State VTT SDRAM I/O termination supply NC No Connection Dimensions (Unit: millimeter) Note: 1. Tolerances on all dimensions +/-0.15mm unless otherwise specified.