TS52003 Version 1.2 High Efficiency SuperCap Charger for Photovoltaic Sources DESCRIPTION FEATURES The TS52003 is a DC/DC synchronous switching Utilizes a temperature-independent PV MPPT-Lite regulation scheme Super Capacitor Charger with fully integrated power switches, internal compensation, and full fault VOUT reverse current blocking protection. The TS52003 utilizes a temperature- Wide input voltage range: 3.2V to 7.2V independent photovoltaic Maximum Power Point Up to 1.5A continuous output current Tracking (MPPT- Lite) calculator to optimize power Programmable temperature-compensated termination output from the source during Full-Charge mode. voltage with a 1% tolerance The switching frequency of 1MHz enables the use of User programmable termination voltage small filter components, which result in smaller board space and reduced BOM costs. High efficiency up to 92% at typical load Current mode PWM control in constant voltage In Full-Charge mode the duty cycle is controlled by Input supply under voltage lockout the MPPT- Lite regulator. Once termination voltage Full protection for V over-voltage OUT is reached, the regulator operates in voltage mode. Device over-current and over-temperature protection When the regulator is disabled (EN is low), the device I2C program interface with EEPROM registers draws 10uA quiescent current. V reverse current blocking OUT The TS52003 integrates a wide range of protection Char ge status indication circuitry including input supply under-voltage lockout, output over-voltage protection, current limit, SUMMARY SPECIFICATIONS and thermal shutdown. Packaged in a 16pin QFN (4x4) The TS52003 includes supervisory reporting through the nFLT (Inverted Fault) open drain output to APPLICATIONS interface other components in the system. Device Off-grid systems programming is achieved by an IC interface through Wireless sensor networks SCL and SDA pins. Smoke detectors HVAC controls TYPICAL APPLICATION Photovoltaic Cells VIN C IN TS52003 GND C Vdd L R OUT SENSE Super Cap VDD SW COUT SCL V SENSE VDD R PULLUP (optional) SDA VOUT VDD R PULLUP (optional) EN nFLT PGND Specifications subject to change WWW.TRIUNESYSTEMS.COM Copyright 2011, Triune Systems, LLC - 1 - SDA VDD SW nFLT PGND EN PGND GND TS52003 Version 1.2 PINOUT SW SCL VIN VIN TS52003 QFN16 4x4 Top/Symbolization View VSENSE NC VOUT NC Figure 1b: Package Pinout Diagram PIN DESCRIPTION Pin Symbol Pin Function Description SW 1 Switching Voltage Node Connected to 4.7uH (typical) inductor VIN 2 Photovoltaic Input Voltage Input voltage VSENSE 3 Current Sense Positive Input Positive input for the MPP current loop. VOUT 4 Super Cap Voltage Regulator Feedback Input Primary ground for the majority of the device except GND 5 GND the low-side power FET. Above 2.2V the device is enabled. GND the pin to EN 6 Enable Input disable the device. Includes internal pull-up. nFLT 7 Inverted Fault Open-drain output. VDD 8 Internal 3.3V Supply Output Connected to 100nF capacitor to GND 9 Unused GND in application 10 Unused GND in application VIN 11 Photovoltaic Input Voltage Input voltage SCL 12 Clock Input IC clock input. SDA 13 Data Input/Output IC data open-drain output. SW 14 Switching Voltage Node Connected to 4.7uH (typical) inductor PGND 15 Power GND GND supply for internal low-side FET/integrated diode PGND 16 Power GND GND supply for internal low-side FET/integrated diode Specifications subject to change WWW.TRIUNESYSTEMS.COM Copyright 2011, Triune Systems, LLC - 2 -