PI2007 Cool-ORing Series Universal High Side Active ORing Controller IC Description Features The PI2007 Cool-ORing solution is a universal Fast dynamic response to power source failure, high-speed Active ORing controller IC designed for with 80ns reverse current turn off delay time. use with N-channel MOSFETs in redundant power 4A gate discharge current system architectures. The PI2007 Cool-ORing Forward Over Current Fault indication controller enables an extremely low power loss Accurate MOSFET drain-to-source voltage solution with fast dynamic response to fault sensing conditions, critical for high availability systems. The Internal charge pump PI2007 controls single or parallel MOSFETs to FET check at initial power-up address Active ORing applications protecting 100V for 100ms, operation in high side against power source failures. The PI2007 has an application internal charge pump enabling an ideal solution in VC under voltage fault detection 12V or 36-75V bus high-side Active ORing applications. Applications The gate drive output turns the MOSFET on in N+1 Redundant Power Systems normal steady state operation, while achieving high- Servers & High End Computing speed turn-off during input power source fault Telecom Systems conditions, that causes reverse current flow. The High-side Active ORing controller auto-resets once the fault clears. The High current Active ORing MOSFET drain-to-source voltage is monitored to detect reverse current flow. The PI2007 has an internal charge pump to drive the gate of a high side Package Information N-Channel MOSFET above the VC input. There is The PI2007 is offered in the following packages: an internal shunt regulator at the VC input for high 10 Lead 3mm x 3mm DFN package voltage applications. Typical Applications: Figure 1: PI2007 High Side Active ORing for 12V Figure 2: PI2007 referenced to Vin in high voltage Bus applications high side Acti ve ORing applications Picor Corporation picorpower.com PI2007 Rev 1.3 Page 1 of 19 Pin Description Pin Name Pin Description Number Gate Turn Off Switch Return: This pin is the high current return path for the gate driver PGND 1 during turn off. Connect this pin to the low side of the VC coupling capacitor and SGND. Gate Drive Output: This pin drives the gate of the external N-channel MOSFET. Under normal operating conditions and when V > 6mV, the GATE pin pulls high to SP-SN GATE 2 approximately 2*VC with respect to the SGND pin. The controller turns the gate off during a reverse current fault that is below the reverse voltage threshold (-6mV) and when VC is in Under Voltage (7.15V). Controller Input Supply: This pin is the supply pin for the control circuitry and gate driver. Connect a 1F capacitor between the VC pin and the SGND pin. Voltage on this VC 3 pin is regulated to 11.7V with respect to SGND by an internal shunt regulator. For high voltage supply applications connect a shunt resistor between the SGND and PGND pins and the supply return, as shown in Figure 2. VC Return: This pin is the return (ground) for the control circuitry. Connect this pin to SGND 4 the low side of VC decoupling capacitor. Controller Input Supply With Limiting Resistor: This pin is connected internally to VC VR 5 through a 420 resistor needed for Bus voltages greater than 10V and less than 14V. Leave this pin open if unused. Positive Sense Input: Connect SP pin to the Source pin of the external N-channel SP 6 MOSFETs. The polarity of the voltage difference between SP and SN provides an indication of current flow direction through the MOSFET. NC 7, 10 Not Connected: Leave pins floating. Negative Sense Input: Connect SN to the Drain pin of the external N-channel MOSFET. SN 8 The polarity of the voltage difference between SP and SN provides an indication of current flow direction through the MOSFET. Fault Status Output: This open collector pin pulls low to indicate one of the several potential fault conditions may exist. The FT pin will pull low after a reverse or forward fault has been detected with a defined delay time (8s). In addition, the FT pin will pull 9 FT low when the controller input voltage is below the VC under-voltage threshold V < VC-SGND 7V. When V > 7.15V and 6mV < V < 275mV this pin clears (High). In high VC-SGND SP-SN voltage applications this output must be translated with reference to the system return with external circuitry, see Figure 19. Leave this pin open if unused. Package Pin-Outs 10 Lead DFN (3mm x 3mm) Top view Picor Corporation picorpower.com PI2007 Rev 1.3 Page 2 of 19