VCS1625P Vishay Foil Resistors High Precision Surface Mount Current Sensing Chip Resistor with Power Rating to 1 W, Temperature Coefficient of Resistance of 2 ppm/C and Load Life Stability of 0.015% FEATURES NEW Temperature coefficient of resistance (TCR): 2 ppm/C typical (- 55 C to + 125 C, + 25 C ref.) (see table 1) Resistance range: 0.01 to 10 (for higher or lower values, please contact Application Engineering) Vishay Foil resistors are not restricted to standard values, INTRODUCTION we can supply specific as required values at no extra cost or delivery (e.g. 1.234 vs. 1 ) Model VCS1625P is a surface mount resistor designed with Resistance tolerance: to 0.2% (0.05% is also available) 4 pads for Kelvin connection. Utilizing VFRs (Vishay Foil Load life stability: 0.015 % at 70 C, 2000 h at rated power Resistors) Bulk Metal Foil as the resistance element, it provides performance capabilities far greater than other Thermal EMF: 0.05 V/C typical resistor technologies can supply in a product of comparable Electrostatic discharge (ESD) at least to 25 kV size. Short time overload < 0.005 % Thermal stabilization time < 1 s (nominal value achieved The key performance of the new VCS1625P is its high rated within 10 ppm of steady state value) power up to 1W. This small device dissipates heat almost Power rating: to 1 W at + 70 C (Figure 1) entirely through the pads so surface mount users are Non inductive: non capacitive design encouraged to be generous with the boards pads and Rise time: 1 ns effectively no ringing traces. Gold terminations are available on special order. Current rating: 5 A maximum The four terminal device separates the current leads from the Current noise: 0.010 V /V of applied voltage RMS voltage sensing leads. This configuration eliminates the (< - 40 dB) effect of the lead wire resistance from points A to B and Voltage coefficient: < 0.1 ppm/V C to D, allowing low TCR current sensing. Non inductive: < 0.08 H Non hot spot design VFRs application engineering department is available to Prototype quantities available in just 5 working days or advise and to make recommendations. For non-standard sooner technical requirements and special applications, please For better performances, please review the VCS1625ZP contact foil vishaypg.com. (Z-Foil) datasheet TERMINATIONS BC Two lead (Pb)-free options are available: gold plated or tin plated R Tin/lead plated I I FIGURE 1 - POWER DERATING CURVE A D - 55 C + 70 C V 100 ~ Zin = 75 50 25 0 - 75 - 50 - 25 0 + 25 + 50 + 75 + 100 + 125 + 150 + 175 Ambient Temperature (C) * Pb containing materials are not RoHS compliant, exemptions may apply Document Number: 63216 For any questions, contact: foil vishaypg.com www.vishayfoilresistors.com Revision: 28-Aug-12 1 Percent of Rated PowerVCS1625P Vishay Foil Resistors (1) TABLE 1 - TOLERANCE AND TCR VS. RESISTANCE VALUE (- 55 C to + 125 C, + 25 Ref.) POWER RATING MAXIMUM VALUE () TOLERANCE TYPICAL TCR MAXIMUM TCR (2) (2) at + 70 C CURRENT > 2R000 to 10R000 0.2 %, 0.5 %, 1 % 2 ppm/C 5 ppm/C > 0R500 to 2R000 0.5 %, 1 % 2 ppm/C 10 ppm/C > 0R100 to 0R500 1 % 2 ppm/C 15 ppm/C (3) 1 W 5 A > 0R050 to 0R100 1 % 2 ppm/C 20 ppm/C > 0R030 to 0R050 1 % 2 ppm/C 30 ppm/C > 0R010 to 0R030 1 % 2 ppm/C 50 ppm/C Notes (1) Tighter performances are available. Please contact application engineering foil vishaypg.com (2) Max Power or Max Current - whichever is lower (3) On FR4 PCB with solder pads per fig 2 FIGURE 2 - DIMENSIONS in Inches (Millimeters) Solder Pad Layout 2 oz. Copper (70 Microns) 0.806 (20.47) Coated by Solder mask 0.020 (0.51) 4 Mounting A Electrical L W (1) Pads Schematic I E 1 1 B I E 1 1 H R I E 2 2 Top View E I 2 2 Bottom View Note 0.070 (1.78) Solder Coated Pads (1) I and E mounting pads are interchangeable 0.260 (6.60) (Windows in Solder Mask) INCHES MILLIMETERS L 0.250 0.010 6.35 0.25 H 0.160 0.010 4.06 0.25 W 0.040 maximum 1.02 maximum A 0.080 0.005 2.03 0.13 B 0.040 0.010 1.02 0.25 FIGURE 3 - TRIMMING TO VALUES FIGURE 4 - TYPICAL RESISTANCE (Conceptual Illustration)* VERSUS TEMPERATURE CURVE AND ITS CHORD SLOPES (TCR) Current Path Interloop Capacitance Before Trimming Reduction in Series + 150 Current Path + 100 After Trimming Mutual Inductance Trimming Process + 50 Reduction due 2 ppm/C (+ 25 C reference) Removes this Material to Opposing from Shorting Strip Area R Current in 0 Changing Current Path Adjacent Lines R and Increasing - 50 (ppm) Resistance - 100 - 150 Note: Foil shown in black, etched spaces in white - 200 * To acquire a precision resistance value, the Bulk Metal Foil chip is trimmed by - 50 - 25 0+ 25 + 50 + 75 + 100 + 125 selectively removing built-in shorting bars. To increase the resistance in known increments, marked areas are cut, producing progressively smaller increases in Ambient Temperature (C) resistance. This method eliminates the effect of hot spot and improves the long term stability of the Foil chips. www.vishayfoilresistors.com For any questions, contact: foil vishaypg.com Document Number: 63216 2 Revision: 28-Aug-12 0.200 (5.08) 0.070 (1.78) 0.020 (0.51) 0.806 (20.47)