W7500P-S2E Wiznet

W7500x Data Sheet Version 1.0.8 Table of Contents Table of Contents ........................................................................................ 2 List of table ............................................................................................... 4 List of figures............................................................................................. 5 1 Introduction ........................................................................................... 6 2 Description ............................................................................................ 7 3 Functional overview ................................................................................. 9 3.1 ARM-Cortex-M0 core with embedded Flash and SRAM ........................... 9 3.2 Memories ................................................................................... 9 3.3 Boot modes................................................................................. 9 3.4 System configuration controller (SYSCFG) ............................................ 10 3.5 Power management ...................................................................... 10 3.5.1 Power supply schemes ........................................................... 10 3.5.2 Low-power modes ................................................................ 10 3.6 Clocks and startup ....................................................................... 11 3.6.1 External Oscillator Clock ........................................................ 12 3.6.2 RC oscillator clock ................................................................ 12 3.6.3 PLL .................................................................................. 12 3.6.4 Generated clock .................................................................. 12 3.7 Interrupts and events .................................................................... 13 3.7.1 Nested vectored interrupt controller (NVIC) .................................. 13 3.7.2 Event controller ................................................................... 13 3.8 Tcp/ip offload engine (TOE) ............................................................ 13 3.9 General-purpose inputs/outputs (GPIOs) ............................................. 14 3.10 Pad controller (PADCON) ................................................................ 14 3.11 Alternative function controller (AFC) ................................................. 16 3.12 External interrupt (EXTI) ................................................................ 18 3.13 Direct memory access controller (DMA) .............................................. 19 3.14 Analog to digital converter (ADC) ...................................................... 19 3.15 Timers and watchdogs ................................................................... 20 3.15.1 System tick timer ................................................................. 20 3.15.2 Pulse-Width Modulation (PWM) ................................................. 20 3.15.3 Dual timers ........................................................................ 20 3.15.4 Watchdog timer ................................................................... 21 3.16 Real-time clock (RTC) ................................................................... 21 3.16.1 RTC clock .......................................................................... 21 3.16.2 RTC interrupt ...................................................................... 21 3.17 Universal asynchronous receiver/transmitter (UART) ............................... 22 W7500x Data Sheet Version1.0.6 2 / 40