1 2 3 4 VCC 3.3V VCC 3.3V As close to chip pin61 as possible PIQ102 PIQ102 COR26 R26 COQ1 Q1 PIR2602 PIR2602 PIR2601 PIR2601 PIQ101 PIQ101 PIC101 PIC101 PIC202 PIC202 Q-MMBT4403 1K COC1 COC2 C1 C2 PIQ103 PIQ103 COLD5 LD5 COR1 R1 PIC102 PIC102 10uF/16VPIC201 PIC201 1uF PIR101 PIR101 PIR102 PIR102 A A COR24 R24 1M PIR2402 PIR2402 PIR2401 PIR2401 PILD501 PILD501 PILD502 PILD502 GND 330R GREEN-0603 COY1 POPC005 POPC005 POPC004 POPC004 POPA004 POPA004 POPA003 POPA003 Y1 12MHz VCC 3.3V UART0 RX LED 1 3 GND VCC 3.3V PIY101 PIY101 PIY103 PIY103 PIC302 PIC302 PIC402 PIC402 PIQ202 PIQ202 COC3 COC4 C3 C4 COR27 R27 COQ2 PIY102 PIY102 PIY104 PIY104 PIC501 PIC501 PIC602 PIC602 Q2 PIR2702 PIR2702 PIR2701 PIR2701 PIQ201 PIQ201 30pF 30pF COC5 COC6 PIC301 PIC301 PIC401 PIC401 C5 C6 Q-MMBT4403 NLSWDIO NLSWCLK NLXOUT 1K NLSDA1 NLSCL1 NLXIN PIC502 PIC502 10uF/16VPIC601 PIC601 1uF PIQ203 PIQ203 COLD6 LD6 COR25 R25 W7500 Clock PIR2501 PIR2501 PIR2502 PIR2502 PILD601 PILD601 PILD602 PILD602 GND 330R PIU1064 PIU1064 PIU1063 PIU1063 PIU1062 PIU1062 PIU1061 PIU1061 PIU1060 PIU1060 PIU1059 PIU1059 PIU1058 PIU1058 PIU1057 PIU1057 PIU1056 PIU1056 PIU1055 PIU1055 PIU1054 PIU1054 PIU1053 PIU1053 PIU1052 PIU1052 PIU1051 PIU1051 PIU1050 PIU1050 PIU1049 PIU1049 GREEN-0603 COU1 GND GND U1 GND W7500 UART0 TX LED Do it round routing from x-tal trace. As close to chip pin10 as possible As close to below layer GND as possible NLSPI0MOSI1 STATUS LED0 1 48 SPI MOSI1 PIU101 PIU101 PIU1048 PIU1048 POPC008 POPC008 POPB003 POPB003 PHY link status Optional I2C SCL0 PC 08 PC 08 PB 03 PB 03 NLSPI0MISO1 STATUS LED1 2 47 SPI MISO1 POPC009 POPC009 PIU102 PIU102 PIU1047 PIU1047 POPB002 POPB002 B TCP connection status Optional I2C SDA0 PC 09 PC 09 PB 02 PB 02 B NLU0TXD2 NLSPI0SCLK1 U TXD2 3 46 SPI SCLK1 For Serial Flash Pins POPC010 POPC010 PIU103 PIU103 PIU1046 PIU1046 POPB001 POPB001 PC 10 PC 10 PB 01 PB 01 NLU0RXD2 NLSPI0SSEL1 U RXD2 4 45 SPI SSEL1 POPC011 POPC011 PIU104 PIU104 PIU1045 PIU1045 POPB000 POPB000 PC 11 PC 11 PB 00 PB 00 NLExpansion0GPIO0D Expansion GPIO D 5 44 PIU105 PIU105 PIU1044 PIU1044 POPC012 POPC012 Optional SPI SSEL0 PC 12 PC 12 PA 15 NLExpansion0GPIO0C NLU0RXD0 Expansion GPIO C 6 43 U RXD0 PIU106 PIU106 PIU1043 PIU1043 POPC013 POPC013 POPA014 POPA014 Optional SPI SCLK0 PC 13 PC 13 PA 14 PA 14 NLExpansion0GPIO0B NLU0TXD0 Expansion GPIO B 7 42 U TXD0 POPC014 POPC014 PIU107 PIU107 PIU1042 PIU1042 POPA013 POPA013 Optional SPI MISO0 PC 14 PC 14 PA 13 PA 13 NLExpansion0GPIO0A NLU0RTS0 Expansion GPIO A 8 41 U RTS0 POPC015 POPC015 PIU108 PIU108 PIU1041 PIU1041 POPA012 POPA012 Optional SPI MOSI0 PC 15 PC 15 PA 12 PA 12 NLU0CTS0 9 40 U CTS0 PIU109 PIU109 PIU1040 PIU1040 POPA011 POPA011 VSS PA 11 PA 11 NLBOOT 10 39 BOOT PIU1010 PIU1010 PIU1039 PIU1039 POBOOT POBOOT VDD BOOT BOOT NLPD000 NLU0DTR0 PD 00 11 38 U DTR0 PIU1011 PIU1011 PIU1038 PIU1038 POCRS POCRS POPA010 POPA010 CRS PD 00 W7500 PA 10 PA 10 with PHY LINK Status function (output singal) NLPD001 NLU0DSR0 PD 01 12 37 U DSR0 PORXDV PORXDV PIU1012 PIU1012 PIU1037 PIU1037 POPA009 POPA009 RXDV PD 01 PA 09 PA 09 with HW Trigger pin fucntion (output signal) NLPD002 NLAPP0BOOT PD 02 13 36 APP BOOT PORXD0 PORXD0 PIU1013 PIU1013 PIU1036 PIU1036 POPA008 POPA008 RXD0 PD 02 PA 08 PA 08 NLPD003 PD 03 14 35 STATUS PORXD1 PORXD1 PIU1014 PIU1014 PIU1035 PIU1035 POPA007 POPA007 RXD1 PD 03 PA 07 PA 07 NLPD004 TQFP64 PD 04 15 34 PIU1015 PIU1015 PIU1034 PIU1034 PORXD2 PORXD2 RXD2 PD 04 PA 06 NLPB006 PB 06 16 33 PIR201 PIR201 PIU1016 PIU1016 PIU1033 PIU1033 PORXD3 PORXD3 RXD3 PB 06 PA 05 COR2 R2 4.7K PIR202 PIR202 VCC 3.3V C MDIO(PB 14),MDC(PB 15) pin is should be handled as GPIOs. C PIU1017 PIU1017 PIU1018 PIU1018 PIU1019 PIU1019 PIU1020 PIU1020 PIU1021 PIU1021 PIU1022 PIU1022 PIU1023 PIU1023 PIU1024 PIU1024 PIU1025 PIU1025 PIU1026 PIU1026 PIU1027 PIU1027 PIU1028 PIU1028 PIU1029 PIU1029 PIU1030 PIU1030 PIU1031 PIU1031 PIU1032 PIU1032 GND PA 00 is PHY LINK check pin(input). This pin checks PHY link from peer GND PIR301 PIR301 COR3 R3 This pin should be connected to the LINK status signal of the RJ-45. VCC 3.3V 330R PIR302 PIR302 COR4 R4 NLSTATUS0LED0 COLD2 STATUS LED0 LD2 PILD202 PILD202 PILD201 PILD201 PIR401 PIR401 PIR402 PIR402 NLRESETn VCC 3.3V NLPB007 NLPB009 NLPB010 NLPB011 NLPB012 NLPB013 NLPB004 NLPB005 NLPB014 NLPB015 BLUE-0603 NLDUP 1K PIR502 PIR502 PILD101 PILD101 COR5 COLD1 R5 LD1 PIR2802 PIR2802 4.7K RED-0603 PILD102 PILD102 COR6 R6 COR28 R28 NLSTATUS0LED1 COLD3 To use Half mode, you must set up pull up. STATUS LED1 LD3 PILD302 PILD302 PILD301 PILD301 PIR601 PIR601 PIR602 PIR602 Pull-up PIR501 PIR501 4.7K/NC GREEN-0603 330R To use Full mode, you must set up pull down.(Default) PIR2801 PIR2801 PORXC PORXC POTXC POTXC POTXD0 POTXD0 POTXD1 POTXD1 POTXD2 POTXD2 POTXD3 POTXD3 POTXEN POTXEN POCOL POCOL POMDIO POMDIO POMDC POMDC PORESETN PORESETn POPHY0AD0 POPHY0AD0 DUP COR23 R23 NLSTATUS COLD4 STATUS LD4 PILD402 PILD402 PILD401 PILD401 PIR2301 PIR2301 PIR2302 PIR2302 GND PIR2902 PIR2902 GREEN-0603 330R GND COR29 R29 There is no pull-up or pull-down in the circuit, make sure W7500 internal register is set as below Pull-down 4.7K Power indicate STATUS indicate 1. Set as GPIO (Alternative function) PIR2901 PIR2901 D D 2. Set as Input pin. (IE in PADCON) WIZnet Co., Ltd. Title * 3. Set as Pull up or pull down. (PADCON) 5F, Humax Village GND Hwangseaul-ro, Bundang-gu Size: A4 Number:* Revision:* For more information, refer to the W7500 reference manual. Seongnam-si, Gyeongi-do Date: 2018-08-03 Sheet of South Korea Team: Team Module Drawn By: Edward 1 2 3 4 XOUT 2 4 XIN PB 07 17 64 XOUT RXC PB 07 XOUT DUP 18 63 XIN PB 08 XIN PB 09 19 62 TXC PB 09 VSS PB 10 20 61 TXD0 PB 10 VDD PB 11 21 60 TXD1 PB 11 X32OUT PB 12 22 59 TXD2 PB 12 XT32IN PB 13 23 58 SDA1 TXD3 PB 13 PC 05 PC 05 PB 04 24 57 SCL1 TXEN PB 04 PC 04 PC 04 PB 05 25 56 COL PB 05 PC 03 PB 14 26 55 MDIO PB 14 PC 02 PB 15 27 54 MDC PB 15 PC 01 RESETn 28 53 RESETn RSTn PC 00 29 52 PHY AD0 PA 00 PC 07 30 51 PA 01 PC 06 31 50 SWDIO PA 02 PA 04 PA 04 32 49 SWCLK TEST PA 03 PA 031 2 3 4 COY2 Y2 25MHz A A 1 3 PIY201 PIY201 PIY203 PIY203 PIC702 PIC702 PIC802 PIC802 COC7 COC8 IP 3.3A IP 3.3V C7 C8 PIY202 PIY202 PIY204 PIY204 PIC701 PIC701 PIC801 PIC801 27pF 27pF COL1 L1 PIL101 PIL101 PIL102 PIL102 HH-1M1608-121JT COC9 VCC 3.3V IP 3.3V PIC1101 PIC1101 PIC1202 PIC1202 PIC901 PIC901 C9 PIC1002 PIC1002 COC10 C10 POTXD1 POTXD1 POTXD2 POTXD2 POTXD3 POTXD3 POTXEN POTXEN POCOL POCOL COC11 COC12 C11 C12 PHY Clock 10uF/16V 0.1uF 10uF/16V 0.1uF GND GND PIC1102 PIC1102 PIC1201 PIC1201 PIC902 PIC902 PIC1001 PIC1001 COL2 L2 PIL201 PIL201 PIL202 PIL202 GND HH-1M1608-121JT PIC1302 PIC1302 PIC1401 PIC1401 Do it round routing from x-tal trace. COC13 COC14 NLXTAL2 NLXTAL1 C13 C14 As close to below layer GND as possible COR7 R7 PIC1301 PIC1301 0.1uF PIC1402 PIC1402 0.1uF PIR702 PIR702 PIR701 PIR701 IP 3.3V GND GND 5.1K As close to chip pin31 as possible COU2 U2 PIU208 PIU208 PIU207 PIU207 PIU206 PIU206 PIU205 PIU205 PIU204 PIU204 PIU203 PIU203 PIU202 PIU202 PIU201 PIU201 B B GND GND IP101GR/GRI PIR801 PIR801 PIR901 PIR901 COR8 R8 As close to chip pin13 as possible COR9 R9 5.1K 5.1K PIR802 PIR802 PIR902 PIR902 9 33 POTXD0 POTXD0 PIU209 PIU209 PIU2033 PIU2033 TXD0 TXD0 GND 10 32 POTXC POTXC PIU2010 PIU2010 PIU2032 PIU2032 PORESETn PORESETN TXC TXCLK RESET N RESETn NLPHY0AD0 PHY AD0 11 31 PIU2011 PIU2011 PIU2031 PIU2031 POPHY0AD0 POPHY0AD0 LINK PHY AD0 LED0/PHYAD0 AVDD33 NLPHY0AD3 NLMDI00T0P COR19 NLMDI0T0P PHY AD3 12 30 MDI0 T P R19 3.3R MDI T P PIU2012 PIU2012 PIU2030 PIU2030 PIR1902 PIR1902 PIR1901 PIR1901 POPHY0AD3 POPHY0AD3 POMDI0T0P POMDI0T0P 100M ACT PHY AD3 LED3/PHYAD3 MDI TP MDI T P NLMDI00T0N COR20 NLMDI0T0N 13 29 MDI0 T N R20 3.3R MDI T N PIU2013 PIU2013 PIU2029 PIU2029 PIR2002 PIR2002 PIR2001 PIR2001 POMDI0T0N POMDI0T0N VDD IO MDI TN MDI T N 14 28 PORXC PORXC PIU2014 PIU2014 PIU2028 PIU2028 RXC RXCLK REGOUT NLMDI00R0P COR21 NLMDI0R0P 15 27 MDI0 R P R21 3.3R MDI R P PORXD3 PORXD3 PIU2015 PIU2015 PIU2027 PIU2027 PIR2102 PIR2102 PIR2101 PIR2101 POMDI0R0P POMDI0R0P RXD3 RXD3 MDI RP MDI R P NLMDI00R0N COR22 NLMDI0R0N 16 26 MDI0 R N R22 3.3R MDI R N PIU2016 PIU2016 PIU2026 PIU2026 PIR2202 PIR2202 PIR2201 PIR2201 PORXD2 PORXD2 POMDI0R0N POMDI0R0N RXD2 RXD2 MDI RN MDI R N 25 PIU2025 PIU2025 ISET PIR1002 PIR1002 COR10 R10 IP 3.3V 6.19K / 1% PIR1001 PIR1001 C C PIU2017 PIU2017 PIU2018 PIU2018 PIU2019 PIU2019 PIU2020 PIU2020 PIU2021 PIU2021 PIU2022 PIU2022 PIU2023 PIU2023 PIU2024 PIU2024 PIR1102 PIR1102 COR11 R11 COC15 PIC1602 PIC1602 PIC1501 PIC1501 C15 COC16 5.1K C16 10uF/16V PIR1101 PIR1101 0.1uF PIR1202 PIR1202 PIC1601 PIC1601 PIC1502 PIC1502 COR12 R12 5.1K PIR1201 PIR1201 GND GND GND COL signal is During the normal operation, this pin outputs a high status signal it means collision is detected. As close to chip pin28 as possible GND PORXD1 PORXD1 PORXD0 PORXD0 PORXDV PORXDV POCRS POCRS POMDC POMDC POMDIO POMDIO <Ethernet line routing> Do not position to other elements(R,L,C) to RJ-45 below There should be no other signal under the differential signal. D D WIZnet Co., Ltd. Title * 5F, Humax Village Hwangseaul-ro, Bundang-gu Size: A4 Number:* Revision:* Seongnam-si, Gyeongi-do Date: 2018-08-03 Sheet of South Korea Team: Team Module Drawn By: Edward 1 2 3 4 XTAL1 2 4 XTAL2 17 8 RXD1 RXD1 TXD1 TXD1 18 7 RXD0 RXD0 TXD2 TXD2 19 6 RXDV RXDV TXD3 TXD3 20 5 CRS CRS/LEDMOD TXEN TXEN 21 4 RXER COL/RMII COL 22 3 XTAL2 MDC MDC X2 23 2 XTAL1 MDIO MDIO X1 24 1 TEST ON TXER/FXSD