EK-U1-ZCU106-ED-G Xilinx

ZCU106 Evaluation Board User Guide UG1244 (v1.4) October 23, 2019Revision History The following table shows the revision history for this document. Section Revision Summary 10/23/2019 Version 1.4 Table 2-1 Updated the part number for PS-side DDR4 SODIMM socket. PS-Side: DDR4 SODIMM Socket Corrected the part number and revised the description. 09/16/2019 Version 1.3 General updates Corrected UTIL 3V3 net name. Removed mention of USB cable being in kit. Updated HDMI block diagram. Deleted obsolete board ID encoding description. 11/08/2018 Version 1.2 Revised PS-side DDR4 SODIMM bit width value General updates throughout. 10/03/2018 Version 1.1 Electrostatic Discharge Caution Revised electrostatic discharge caution. Figure 2-2 Revised to reflect current board revision. Table 2-2 Revised to reflect current board revision. Added reference to Zynq UltraScale+ MPSoC Data PS-Side: DDR4 SODIMM Socket Sheet: DC and AC Switching Characteristics (DS925). Added information on the memory components and a PL-Side: DDR4 Component Memory reference to Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching Characteristics (DS925). Table 3-32 Revised table note. Table 3-35 Replaced pin AP8 with AE15. Table 3-38 Revised pin names. PCI Express Endpoint Connectivity Revised third paragraph. Revised appendix title and removed constraints file Appendix B, Xilinx Constraints File listing. Appendix C, Regulatory and Compliance Information Added answer record information. 03/28/2018 Version 1.0 Initial Xilinx release. ZCU106 Board User Guide 2 Send Feedback UG1244 (v1.4) October 23, 2019 www.xilinx.com