OBSOLETE OBSOLETE OBSOLETE OBSOLETE
0
R
Spartan-IIE FPGA Family
Data Sheet
DS077 August 9, 2013 0 0 Product Specification
This document includes all four modules of the Spartan -IIE FPGA data sheet.
Module 1: Module 3:
Introduction and Ordering Information DC and Switching Characteristics
DS077-1 (v3.0) August 9, 2013 DS077-3 (v3.0) August 9, 2013
Introduction DC Specifications
- Absolute Maximum Ratings
Features
- Recommended Operating Conditions
General Overview
- DC Characteristics
Product Availability
- Power-On Requirements
User I/O Chart
- DC Input and Output Levels
Ordering Information
Switching Characteristics
-Pin-to-Pin Parameters
Module 2:
- IOB Switching Characteristics
Functional Description
- Clock Distribution Characteristics
DS077-2 (v3.0) August 9, 2013
- DLL Timing Parameters
Architectural Description
- CLB Switching Characteristics
- Spartan-IIE Array
- Block RAM Switching Characteristics
- Input/Output Block
- TBUF Switching Characteristics
- Configurable Logic Block
- JTAG Switching Characteristics
- Block RAM
- Configuration Switching Characteristics
- Clock Distribution: Delay-Locked Loop
- Boundary Scan
Module 4:
Development System
Pinout Tables
Configuration
DS077-4 (v3.0) August 9, 2013
Pin Definitions
Pinout Tables
IMPORTANT NOTE: The Spartan-IIE FPGA data sheet is in four modules. Each module has its own Revision History at the
end. Use the PDFBookmark for easy navigation in this volume.
20012013 Xilinx, Inc. All rights reserved. XILINX, the Xilinx logo, the Brand Window, and other designated brands included herein are trademarks of Xilinx, Inc. All other
trademarks are the property of their respective owners.
DS077 August 9, 2013 www.xilinx.com 1
Product Specification OBSOLETE OBSOLETE OBSOLETE OBSOLETE
R
2 www.xilinx.com DS077 August 9, 2013
Product Specification