Zynq-7000 SoC (Z-7030, Z-7035, Z-7045, and Z-7100): DC and AC Switching Characteristics DS191 (v1.18.1) July 2, 2018 Product Specification Introduction The Zynq-7000 SoCs are available in -3, -2, -2LI, -1, and All supply voltage and junction temperature specifications -1LQ speed grades, with -3 having the highest performance. are representative of worst-case conditions. The The -2LI devices operate at programmable logic (PL) parameters included are common to popular designs and V /V = 0.95V and are screened for lower typical applications. CCINT CCBRAM maximum static power. The speed specification of a -2LI The available device/package combinations are outlined in: device is the same as that of a -2 device. The -1LQ devices operate at the same voltage and speed as the -1Q devices Zynq-7000 SoC Overview (DS190) and are screened for lower power. Zynq-7000 device DC Defense-grade Zynq-7000Q SoC Overview (DS196) and AC characteristics are specified in commercial, XA Zynq-7000 SoC Overview (DS188) extended, industrial, and expanded (Q-temp) temperature ranges. Except the operating temperature range or unless This Zynq-7000 SoC data sheet, which covers the otherwise noted, all the DC and AC electrical parameters specifications for the XC7Z030, XA7Z030, XQ7Z030, are the same for a particular speed grade (that is, the timing XC7Z035, XC7Z045, XQ7Z045, XC7Z100, and XQ7Z100 characteristics of a -1 speed grade industrial device are the complements the Zynq-7000 SoC documentation suite same as for a -1 speed grade commercial device). However, available on the Xilinx website at www.xilinx.com/zynq. only selected speed grades and/or devices are available in the commercial, extended, or industrial temperature ranges. DC Characteristics (1) Table 1: Absolute Maximum Ratings Symbol Description Min Max Units Processing System (PS) V PS internal logic supply voltage 0.5 1.1 V CCPINT V PS auxiliary supply voltage 0.5 2.0 V CCPAUX V PS PLL supply 0.5 2.0 V CCPLL V PS DDR I/O supply 0.5 2.0 V CCO DDR (2) V PS MIO I/O supply 0.5 3.6 V CCO MIO V PS input reference voltage 0.5 2.0 V PREF (2)(3)(4)(5) V PS MIO I/O input voltage 0.40 V +0.55 V PIN CCO MIO PS DDR I/O input voltage 0.55 V +0.55 V CCO DDR Programmable Logic (PL) V PL internal supply voltage 0.5 1.1 V CCINT V PL supply voltage for the block RAM memories 0.5 1.1 V CCBRAM V PL auxiliary supply voltage 0.5 2.0 V CCAUX PL output drivers supply voltage for HR I/O banks 0.5 3.6 V V CCO PL output drivers supply voltage for HP I/O banks 0.5 2.0 V (4) V Auxiliary supply voltage 0.5 2.06 V CCAUX IO Copyright 20122018 Xilinx, Inc. Xilinx, the Xilinx logo, Zynq, Virtex, Artix, Kintex, Spartan, ISE, Vivado and other designated brands included herein are trademarks of Xilinx in the United States and other countries. AMBA, AMBA Designer, ARM, Cortex-A9, CoreSight, Cortex, PrimeCell, ARM Powered, and ARM Connected Partner are trademarks of ARM Ltd. All other trademarks are the property of their respective owners. DS191 (v1.18.1) July 2, 2018 www.xilinx.com Send Feedback Product Specification 1Zynq-7000 SoC (Z-7030, Z-7035, Z-7045, and Z-7100): DC and AC Switching Characteristics (1) Table 1: Absolute Maximum Ratings (Contd) Symbol Description Min Max Units Input reference voltage V 0.5 2.0 V REF I/O input voltage for HR I/O banks 0.40 V +0.55 V CCO I/O input voltage for HP I/O banks 0.55 V +0.55 V (3)(4)(5) CCO V IN I/O input voltage (when V = 3.3V) for V and differential I/O standards CCO REF 0.40 2.625 V (6) except TMDS 33 Key memory battery backup supply V 0.5 2.0 V CCBATT GTX Transceiver V Analog supply voltage for the GTX transmitter and receiver circuits 0.5 1.1 V MGTAVCC V Analog supply voltage for the GTX transmitter and receiver termination circuits 0.5 1.32 V MGTAVTT V Auxiliary analog Quad PLL (QPLL) voltage supply for the GTX transceivers 0.5 1.935 V MGTVCCAUX V GTX transceiver reference clock absolute input voltage 0.5 1.32 V MGTREFCLK Analog supply voltage for the resistor calibration circuit of the GTX transceiver V 0.5 1.32 V MGTAVTTRCAL column V Receiver (RXP/RXN) and Transmitter (TXP/TXN) absolute input voltage 0.5 1.26 V IN I DC input current for receiver input pins DC coupled RX termination = floating 14 mA DCIN-FLOAT I DC input current for receiver input pins DC coupled RX termination = V 12 mA DCIN-MGTAVTT MGTAVTT I DC input current for receiver input pins DC coupled RX termination = GND 6.5 mA DCIN-GND I DC output current for transmitter pins DC coupled RX termination = floating 14 mA DCOUT-FLOAT I DC output current for transmitter pins DC coupled RX termination = V 12 mA DCOUT-MGTAVTT MGTAVTT XADC V XADC supply relative to GNDADC 0.5 2.0 V CCADC V XADC reference input relative to GNDADC 0.5 2.0 V REFP Temperature T Storage temperature (ambient) 65 150 C STG (7) Maximum soldering temperature for Pb/Sn component bodies +220 C T SOL (7) Maximum soldering temperature for Pb-free component bodies +260 C (7) T Maximum junction temperature +125 C j Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings might cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time might affect device reliability. 2. Applies to both MIO supply banks V and V . CCO MIO0 CCO MIO1 3. The lower absolute voltage specification always applies. 4. For I/O operation, refer to the 7 Series FPGAs SelectIO Resources User Guide (UG471) or the Zynq-7000 SoC Technical Reference Manual (UG585). 5. The maximum limit applies to DC signals. For maximum undershoot and overshoot AC specifications, see Table 4 and Table 5. 6. See Table 12 for TMDS 33 specifications. 7. For soldering guidelines and thermal considerations, see the Zynq-7000 SoC Packaging and Pinout Specification (UG865). DS191 (v1.18.1) July 2, 2018 www.xilinx.com Send Feedback Product Specification 2