Doc. No. DSA3R56E40ABFF.03 A3R56E40ABF 256Mb DDR2 SDRAM 256Mb DDRII SDRAM Specification A3R56E40ABF Zentel Japan Corp. Rev. 03 Oct. 13, 2020ddddddddddddddddddddddddddddddddddddddddddddddddddddddddddddddddddddddddddddZentel Japan Corporation reserves the right to change products and/or specifications without notice. 1 / 73 2020 Zentel Japan Corporation. All rights reserved. Doc. No. DSA3R56E40ABFF.03 A3R56E40ABF 256Mb DDR2 SDRAM Specifications Features Density: 256M bits Double-data-rate architecture two data transfers per clock cycle Organization The high-speed data transfer is realized by the 4 bits 4M words 16 bits 4 banks (A3R56E40ABF) prefetch pipelined architecture Package Bi-directional differential data strobe (DQS and /DQS) is 84-ball FBGA(BGA) (A3R56E40ABF) transmitted/received with data for capturing data at the Lead-free (RoHS compliant) receiver Power supply: VDD, VDDQ 1.8V 0.1V DQS is edge-aligned with data for READs center- Data rate: 1066Mbps/800Mbps(max.) aligned with data for WRITEs 1KB page size (A3R56E40ABF) Differential clock inputs (CK and /CK) Row address: A0 to A12 DLL aligns DQ and DQS transitions with CK transitions Column address: A0 to A8 Commands entered on each positive CK edge data and Four internal banks for concurrent operation data mask referenced to both edges of DQS Interface: SSTL 18 Data mask (DM) for write data Burst lengths (BL): 4, 8 Posted /CAS by programmable additive latency for Burst type (BT): better command and data bus efficiency Sequential (4, 8) On-Die-Termination for better signal quality Interleave (4, 8) /DQS can be disabled for single-ended /CAS Latency (CL): 3, 4, 5, 6, 7 Data Strobe operation Precharge: auto precharge option for each burst access Off-Chip Driver (OCD) impedance adjustment is not supported Driver strength: normal/weak Refresh: auto-refresh, self-refresh Refresh cycles: 8192 cycles/64ms Average refresh period 7.8s at 0C TC 85C 3.9s at 85C TC 95C Operating case temperature range TC = 0C to +95C Rev. 03 Oct. 13, 2020ddddddddddddddddddddddddddddddddddddddddddddddddddddddddddddddddddddddddddddZentel Japan Corporation reserves the right to change products and/or specifications without notice. 2 / 73 2020 Zentel Japan Corporation. All rights reserved.