Data Sheet Rev. 1.00/ September 2011 ZSSC3123 cLite Capacitive Sensor Signal Conditioner ZSSC3123 cLite Capacitive Sensor Signal Conditioner Brief Description Benefits The ZSSC3123 cLite is a CMOS integrated circuit Minimized calibration costs: no laser trimming, for accurate capacitance-to-digital conversion and one-pass calibration using a digital interface sensor-specific correction of capacitive sensor sig- Wide capacitance range to support a broad nals. Digital compensation of sensor offset, sensiti- portfolio of different sensor elements vity and temperature drift is accomplished via an Excellent for low-power battery applications internal digital signal processor running a correction algorithm with calibration coefficients stored in a Interfaces non-volatile EEPROM. The ZSSC3123 is configurable for capacitive sen- IC or SPI interfaceeasy connection to a C sors with capacitances up to 260pF and a sensitivity PDM outputs (Filtered Analog Ratiometric) for of 125aF/LSB to 1pF/LSB depending on resolution, both capacitance and temperature speed, and range settings. It is compatible with both Up to two alarms that can act as full push-pull or single capacitive sensors (both terminals must be open-drain switches accessible) and differential capacitive sensors. Measured and corrected sensor values can be 2 * output as I C , SPI, PDM, or alarms. Physical Characteristics 2 The I C interface can be used for a simple PC- Supply voltage: 2.3V to 5.5V controlled calibration procedure to program a set of Typical current consumption 650A down to calibration coefficients into an on-chip EEPROM. The calibrated ZSSC3123 and a specific sensor are 60A depending on configuration mated digitally: fast, precise, and without the cost Typical Sleep Mode current: 1A at 85C overhead of trimming by external devices or laser. Operation temperature: 40C to +125C Die or TSSOP14 package Features Maximum target input capacitance: 260pF Available Support Sampling rates as fast as 0.7ms 8-bit 1.6ms 10-bit 5.0ms 12-bit 18.5ms 14-bit ZSSC3123 SSC Evaluation Kit available: SSC st Evaluation Board, samples, software, Digital compensation of sensor: piece-wise 1 nd documentation. and 2 order sensor compensation or up to rd 3 order single-region sensor compensation Support for industrial mass calibration available. st nd Digital compensation of 1 and 2 order Quick circuit customization option for large temperature gain and offset drift production volumes. Internal temperature compensation reference (no external components) Application: Digital Output, Alarms Programmable capacitance span and offset V VDD SUPPLY cLite Layout customized for die-die bonding with sensor (+2.3V to 5.5V) Vcore ZSSC3123 for low-cost, high-density chip-on-board assembly 0.1F 0.1F Ready Accuracy as high as VSS SDA/MISO 0.25% FSO -40 to 125C, 3V, 5V, Vsupply 10% GND SCL/SCLK SS C0 Alarm High CC Alarm Low * 2 I C is a registered trademark of NXP. See data sheet section 1.3 for restrictions. 2011 Zentrum Mikroelektronik Dresden AG Rev. 1.00 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.