ACT8865 Rev 7, 22-Mar-16 Advanced PMU for Atmel SAMA5Dx Series & SAM9 Series Processors such as human-machine interfaces, control panels, FEATURES smart grid infrastructures, network gateways, M2M systems, 2D barcode scanners, barcode printers, Three Step-Down DC/DC Converters machine vision equipment, as well as home and Four Low-Dropout Linear Regulators commercial building automations, POS terminals, 2 TM I C Serial Interface medical devices and white goods. This device features three step-down DC/DC Advanced Enable/Disable Sequencing Controller converters and four low-noise, low-dropout linear Minimal External Components regulators. Tiny 44mm TQFN44-32 Package The three DC/DC converters utilize a high- 0.75mm Package Height efficiency, fixed-frequency (2MHz), current-mode Pb-Free and RoHS Compliant PWM control architecture that requires a minimum number of external components. Two DC/DCs are capable of supplying up to 1150mA of output GENERAL DESCRIPTION current, while the third supports up to 1300mA. All The ACT8865 is a complete, cost effective, highly- four low-dropout linear regulators are high- TM efficient ActivePMU power management solution, performance, low-noise, regulators that supply up to optimized for the unique power, voltage- 320mA. sequencing, and control requirements of the Atmel The ACT8865 is available in a compact, Pb-Free SAMA5D2 series ,SAMA5D3 series: SAMA5D and RoHS-compliant TQFN44-32 package. 31/33/34/35/36 , and SAM9 series:SAM9G 15/25/35/45/46 SAM9X 25/35 , SAM9M 10/11 , SAM9N 11/12 processors. It is ideal for a wide range of high performance portable handheld applications TYPICAL APPLICATION DIAGRAM Atmel SAMA5Dx ACT8865 REG1 1.8V 1150mA VDDIODDR etc. REG2 1150mA 1.2V VDDCORE GBIT ENET etc. REG3 3.3V 1300mA VDDIOP etc. REG4 320mA VDDFUSE REG5 320mA VDDANA Auxiliary 1 REG6 320mA REG7 320mA Auxiliary 1 TWD SDA TWCK SCL PUSH BUTTON nPBIN NRST nRSTO nIRQ FIQ/IRQ nPBSTAT GPIO www.active-semi.com - 1 - TM ActivePMU is a trademark of Active-Semi. Copyright 2016 Active-Semi, Inc. 2 TM I C is a trademark of NXP. ACT8865 Rev 7, 22-Mar-16 TABLE OF CONTENTS General Information ..................................................................................................................................... p. 01 Functional Block Diagram ............................................................................................................................ p. 03 Ordering Information .................................................................................................................................... p. 04 Pin Configuration ......................................................................................................................................... p. 04 Pin Descriptions ........................................................................................................................................... p. 05 Absolute Maximum Ratings ......................................................................................................................... p. 07 2 I C Interface Electrical Characteristics ........................................................................................................ p. 08 Global Register Map .................................................................................................................................... p. 09 Register and Bit Descriptions ...................................................................................................................... p. 10 System Control Electrical Characteristics .................................................................................................... p. 14 Step-Down DC/DC Electrical Characteristics .............................................................................................. p. 15 Low-Noise LDO Electrical Characteristics ................................................................................................... p. 16 Typical Performance Characteristics ........................................................................................................... p. 17 System control information .......................................................................................................................... p. 21 Interfacing with the Atmel SAMA5D2, SAMA5D3 Series & SAM9 Series Processors .................... p. 21 Control Signals ................................................................................................................................. p. 22 Push-Button Control ......................................................................................................................... p. 22 Control Sequences ........................................................................................................................... p. 23 Functional Description ................................................................................................................................. p. 24 2 I C Interface ..................................................................................................................................... p. 24 Voltage Monitor and Interrupt ........................................................................................................... p. 24 Thermal Shutdown ........................................................................................................................... p. 24 Step-Down DC/DC Regulators .................................................................................................................... p. 25 General Description .......................................................................................................................... p. 25 100% Duty Cycle Operation ............................................................................................................. p. 25 Synchronous Rectification ................................................................................................................ p. 25 Soft-Start .......................................................................................................................................... p. 25 Compensation .................................................................................................................................. p. 25 OK and Output Fault Interrupt ....................................................................................................... p. 25 PCB Layout Considerations ............................................................................................................. p. 26 Low-Noise, Low-Dropout Linear Regulators ................................................................................................ p. 27 General Description .......................................................................................................................... p. 27 Output Current Limit ......................................................................................................................... p. 27 Compensation .................................................................................................................................. p. 27 Configuration Options ....................................................................................................................... p. 27 OK and Output Fault Interrupt ....................................................................................................... p. 27 PCB Layout Considerations ............................................................................................................. p. 28 Errata Info .................................................................................................................................................... p. 29 Errata Name ..................................................................................................................................... p. 29 Device Identification ......................................................................................................................... p. 29 Recommendation ............................................................................................................................. p. 29 Workaround ...................................................................................................................................... p. 29 TQFN44-32 Package Outline and Dimensions ........................................................................................... p. 30 Revision History ........................................................................................................................................... p. 31 www.active-semi.com TM ActivePMU is a trademark of Active-Semi. Copyright 2016 Active-Semi, Inc. 2 TM I C is a trademark of NXP.