96D3-4G1333NN-AP Advantech

Apacer Memory Product Specification 4GB Unbuffered DDR3 SDRAM DIMM with SPD Ordering Information Component Number of Part Number Bandwidth Speed Grade Max Frequency CAS Latency Density Organization Composition Rank 78.B1GDE.AF1 10.6GB/sec 1333Mbps 667MHz CL9 4GB 512Mx64 256Mx8*16EA 2 Specifications Features On Dimm Thermal Sensor: No Double-data-rate architecture two data transfers per clock cycle Density: 4GB The high-speed data transfer is realized by the 8 bits Organization prefetch pipelined architecture 512M words 64 bits, 2 ranks Bi-directional differential data strobe (DQS and /DQS) Mounting 16 pieces of 2G bits DDR3 SDRAM sealed is transmitted/received with data for capturing data at in FBGA the receiver Package: 240-pin socket type dual in line memory DQS is edge-aligned with data for READs center- module (DIMM) aligned with data for WRITEs PCB height: 30.0mm Differential clock inputs (CK and /CK) Lead pitch: 1.0mm (pin) DLL aligns DQ and DQS transitions with CK Lead-free (RoHS compliant) transitions Power supply: VDD = 1.5V 0.075V Commands entered on each positive CK edge data and data mask referenced to both edges of DQS Eight internal banks for concurrent operation (components) Data mask (DM) for write data Interface: SSTL 15 Posted /CAS by programmable additive latency for Burst lengths (BL): 8 and 4 with Burst Chop (BC) better command and data bus efficiency /CAS Latency (CL): 6, 7, 8, 9 On-Die-Termination (ODT) for better signal quality Synchronous ODT /CAS write latency (CWL): 5, 6, 7 Dynamic ODT Precharge: auto precharge option for each burst access Asynchronous ODT Refresh: auto-refresh, self-refresh Multi Purpose Register (MPR) for temperature read Refresh cycles out Average refresh period ZQ calibration for DQ drive and ODT 7.8 s at 0C TC +85C Programmable Partial Array Self-Refresh (PASR) 3.9 s at +85C < TC +95C /RESET pin for Power-up sequence and reset Operating case temperature range function TC = 0C to +95C SRT range: Normal/extended Auto/manual self-refresh Programmable Output driver impedance control Apacer Memory Product Specification Pin Configurations Front side 1 pin 48 pin 49 pin 120 pin 121 pin 168 pin 169 pin 240 pin Back side Pin No. Pin name Pin No. Pin name Pin No. Pin name Pin No. Pin name 1 VREFDQ 61 A2 121 VSS 181 A1 2 VSS 62 VDD 122 DQ4 182 VDD 3 DQ0 63 CK1 123 DQ5 183 VDD 4 DQ1 64 /CK1 124 VSS 184 CK0 5 VSS 65 VDD 125 DM0 185 /CK0 6 /DQS0 66 VDD 126 NC 186 VDD 7 DQS0 67 VREFCA 127 VSS 187 NC 8 VSS 68 NC 128 DQ6 188 A0 9 DQ2 69 VDD 129 DQ7 189 VDD 10 DQ3 70 A10(AP) 130 VSS 190 BA1 11 VSS 71 BA0 131 DQ12 191 VDD 12 DQ8 72 VDD 132 DQ13 192 /RAS 13 DQ9 73 /WE 133 VSS 193 /CS0 14 VSS 74 /CAS 134 DM1 194 VDD 15 /DQS1 75 VDD 135 NC 195 ODT0 16 DQS1 76 /CS1 136 VSS 196 A13 17 VSS 77 ODT1 137 DQ14 197 VDD 18 DQ10 78 VDD 138 DQ15 198 NC 19 DQ11 79 NC 139 VSS 199 VSS 20 VSS 80 VSS 140 DQ20 200 DQ36 21 DQ16 81 DQ32 141 DQ21 201 DQ37 22 DQ17 82 DQ33 142 VSS 202 VSS 23 VSS 83 VSS 143 DM2 203 DM4 24 /DQS2 84 /DQS4 144 NC 204 NC 25 DQS2 85 DQS4 145 VSS 205 VSS 26 VSS 86 VSS 146 DQ22 206 DQ38 27 DQ18 87 DQ34 147 DQ23 207 DQ39 28 DQ19 88 DQ35 148 VSS 208 VSS 29 VSS 89 VSS 149 DQ28 209 DQ44 30 DQ24 90 DQ40 150 DQ29 210 DQ45 31 DQ25 91 DQ41 151 VSS 211 VSS 32 VSS 92 VSS 152 DM3 212 DM5 33 /DQS3 93 /DQS5 153 NC 213 NC 34 DQS3 94 DQS5 154 VSS 214 VSS 35 VSS 95 VSS 155 DQ30 215 DQ46 36 DQ26 96 DQ42 156 DQ31 216 DQ47